AMD Typewriter x86 사용자 설명서

22007E/0—November 1999

This appendix uses the following definitions and abbreviations:

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UC—Uncacheable memory type

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WC—Write-combining memory type

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WT—Writethrough memory type

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WP—Write-protected memory type

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WB—Writeback memory type

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One Byte—8 bits

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One Word—16 bits

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Longword—32 bits (same as a x86 doubleword)

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Quadword—64 bits or 2 longwords

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Octaword—128 bits or 2 quadwords

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Cache Block—64 bytes or 4 octawords or 8 quadwords

Write combining is the merging of multiple memory write
cycles that target locations within the address range of a write
b u f f e r.  The   A MD A t h lo n   p ro c e ss or   c o m b ine s   multi p le
memory-write cycles to a 64-byte buffer whenever the memory
address is within a WC or WT memory type region. The
processor continues to combine writes to this buffer without
writing the data to the system, as long as certain rules apply
(see Table 9 on page 158 for more information).

The steps required for programming write combining on the
AMD Athlon processor are as follows:

1. Verify the presence of an AMD Athlon processor by using

the CPUID instruction to check for the instruction family
code and vendor identification of the processor. Standard
function 0 on AMD processors returns a vendor
identification string of “AuthenticAMD” in registers EBX,
EDX, and ECX. Standard function 1 returns the processor