Philips SA7016 사용자 설명서

2

1999 Nov 04

853–2160 22634

The SA7016 BICMOS device integrates programmable dividers,
charge pumps and a phase comparator to implement a
phase-locked loop. The device is designed to operate from 3 NiCd
cells, in pocket phones, with low current and nominal 3 V supplies.

The synthesizer operates at VCO input frequencies up to 1.3 GHz.
The synthesizer has fully programmable main and reference
dividers. All divider ratios are supplied via a 3-wire serial
programming bus.

Separate power and ground pins are provided to the analog and
digital circuits. The ground leads should be externally short-circuited
to prevent large currents flowing across the die and thus causing
damage. V

DDCP

 

 must be greater than or equal to

 

V

DD

.

The charge pump current (gain) is set by an external resistance at
the R

SET 

pin

. 

Only passive loop filters could be used; the charge

pump operates within a wide voltage compliance range to provide a
wider tuning range.

•

Low phase noise

•

Low power

•

Fully programmable main divider

•

Internal fractional spurious compensation

•

Hardware and software power down

•

Split supply for V

DD

 and V

DDCP

SR01505

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

LOCK

TEST

V

DD

GND

RFin+

RFin–

GND

CP

PHP

PON

STROBE

DATA

CLOCK

REFin+

REFin–

R

SET

V

DDCP

•

350–1300 MHz wireless equipment

•

Cellular phones

•

Portable battery-powered radio equipment.

V

DD

Supply voltage

2.7

–

5.5

V

V

DDCP

Analog supply voltage

V

DDCP 

≥

 

V

DD

2.7

–

5.5

V

I

DDCP

+I

DD

Total supply current

–

6.2

7.3

mA

I

DDCP

+I

DD

Total supply current in power-down mode

–

1

–

µ

A

f

VCO

Input frequency

350

–

1300

MHz

f

REF

Crystal reference input frequency

5

–

40

MHz

f

PC

Maximum phase comparator frequency

–

4

MHz

T

amb

Operating ambient temperature

–40

–

+85

°

C

SA7016DH

TSSOP16

Plastic thin shrink small outline package; 16 leads; body width 4.4 mm

SOT403–1