데이터 시트 (CDCLVD1213EVM)차례Low Additive Jitter, Four-LVDS-Outputs Clock Buffer With Divider EVM11 Features11.1 General Description11.2 Signal Path and Control Circuitry22 Getting Started23 Power Supply Connection24 Input Clock Connection25 Output Clock26 Onboard Oscillator/VCO27 The EVM Board Schematic28 Bill of Materials6Important Notices7크기: 362킬로바이트페이지: 8Language: English매뉴얼 열기
