数据表 (CDCLVD1213EVM)目录Low Additive Jitter, Four-LVDS-Outputs Clock Buffer With Divider EVM11 Features11.1 General Description11.2 Signal Path and Control Circuitry22 Getting Started23 Power Supply Connection24 Input Clock Connection25 Output Clock26 Onboard Oscillator/VCO27 The EVM Board Schematic28 Bill of Materials6Important Notices7文件大小： 362.4 KB页数： 8Language: English打开用户手册
