Texas Instruments THS5651A Evaluation Module THS5651EVM 사용자 매뉴얼

차례

• Table of Contents

  2
• Preface

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• 1 EVM Overview

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  • 1.1 System Block Diagram

    8
  • 1.2 CommsDAC System Description

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    • 1.2.1 THS5671A/THS5661A/THS5651A/THS5641A CommsDAC

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    • 1.2.2 Control/Interface

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    • 1.2.3 Output Stage

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  • 1.3 EVM Operating Modes

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    • 1.3.1 C542/C54xx DSK/Microprocessor Mode

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    • 1.3.2 Pattern Generator Mode

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    • 1.3.3 Analog Output

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  • 1.4 Power and Cabling Requirements

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  • 1.5 Printed Circuit Assembly as Part of a System

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    • 1.5.1 C542/C54xx DSK/Microprocessor Mode

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    • 1.5.2 Pattern Generator Mode

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    • 1.5.3 CommsDAC Output Configurations

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  • 1.6 Printed Circuit Assembly Options Available

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• 2 Getting Started

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  • 2.1 Physical Description

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  • 2.2 Parts List

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• 3 User Configurations

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  • 3.1 Schematic Diagram

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  • 3.2 User Options

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  • 3.3 Analog/Digital Supply Voltages

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  • 3.4 Digital Input Configurations

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    • 3.4.1 Apply DSP Signals to THS56X1A CommsDAC

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    • 3.4.2 Apply Pattern Generator Signals to THS56X1A CommsDAC

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  • 3.5 Generating a Voltage Reference

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    • 3.5.1 Internal Reference

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    • 3.5.2 Onboard External Reference

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  • 3.6 External Clock

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    • 3.6.1 External Clock Generation

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    • 3.6.2 C542/C54xxDSK/Microprocessor Mode

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    • 3.6.3 Analog Output Circuits

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  • 3.7 Connector Pin and Function Assignments

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• 4 Control Modes

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  • 4.1 SLEEP Input Pin

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  • 4.2 MODE Input Pin

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  • 4.3 BIASJ Input Pin

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  • 4.4 EXTLO Input Pin

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  • 4.5 EXTIO Input Pin

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• 5 Software

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