Fujitsu FR81S Manual Do Utilizador
CHAPTER 21: 32-BIT FREE-RUN TIMER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT FREE-RUN TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
17
4.1.4. Timer Data Register : TCDT
The bit configuration of the timer data register is shown.
The timer data register is used for reading the count value of the 32-bit free-run timer.
TCDT3-5 (Free-run timer 3-5): Address Base_addr+04
H
(Access: Word)
bit
31
0
T[31:0]
Initial value 0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
Attribute
R,W
[bit31 to bit0] T[31:0] :
⋅
The count value of the 32-bit free-run timer can be read by reading the timer data register.
⋅
Timer value can be written to the free-run timer by writing to the timer data register. Always write to this
register while the free-run timer is inactive (timer control register lower (STOP of TCCSL = "1")).
⋅
When accessing this register, use a word access instruction.
⋅
The 32-bit free-run timer will be initialized as soon as any of the following occurs.
⋅
Reset
⋅
The Clear bit (SCLR = "1") of the timer state control register (TCCSL)
⋅
The timer count value matches the compare clear register
⋅
Writing to this register while it is in operation will have no meaning.
MB91520 Series
MN705-00010-1v0-E
812