Kenwood TK-2102G Manual Do Utilizador
TK-2102G
8
CIRCUIT DESCRIPTION
Fig. 4 PLL circuit
Fig. 6 Transmit audio and QT/DQT encoder
3) Unlock Detector
If a pulse signal appears at the LD pin of IC1, an unlock
condition occurs, and the DC voltage obtained from D7, R1,
and C1 causes the voltage applied to the UL pin of the mi-
croprocessor to go low. When the microprocessor detects
this condition, the transmitter is disabled, ignoring the push-
to-talk switch input signal. (See Fig.5)
and C1 causes the voltage applied to the UL pin of the mi-
croprocessor to go low. When the microprocessor detects
this condition, the transmitter is disabled, ignoring the push-
to-talk switch input signal. (See Fig.5)
4. Transmitter
1) Transmit Audio
The modulation signal from the microphone is amplifi ed
by IC500 (1/2), passes through a pre-emphasis circuit, and
amplifi ed by the other IC500 (1/2) to perform IDC operation.
The signal then passes through a low-pass filter (splatter
fi Iter) (Q501 and Q502) and cuts 3kHz and higher frequen-
cies. The resulting signal goes to the VCO through the VCO
modulation terminal for direct FM modulation. (See Fig. 6)
amplifi ed by the other IC500 (1/2) to perform IDC operation.
The signal then passes through a low-pass filter (splatter
fi Iter) (Q501 and Q502) and cuts 3kHz and higher frequen-
cies. The resulting signal goes to the VCO through the VCO
modulation terminal for direct FM modulation. (See Fig. 6)
Fig. 5 Unlock detector circuit
2) VCO
The operating frequency is generated by Q4 in transmit
mode and Q3 in receive mode. The oscillator frequency is
controlled by applying the VCO control voltage, obtained
from the phase comparator, to the varactor diodes (D1 and
controlled by applying the VCO control voltage, obtained
from the phase comparator, to the varactor diodes (D1 and
D2 in transmit mode and D3 and D4 in receive mode). The
T/R pin is set high in receive mode causing Q5 and Q7 to
turn Q4 off, and turn Q3 on . The T/R pin is set low in trans-
mit mode. The outputs from Q3 and Q4 are amplifi ed by Q6
and sent to the buffer amplifi ers.
T/R pin is set high in receive mode causing Q5 and Q7 to
turn Q4 off, and turn Q3 on . The T/R pin is set low in trans-
mit mode. The outputs from Q3 and Q4 are amplifi ed by Q6
and sent to the buffer amplifi ers.
2) QT/DQT Encoder
A necessary signal for QT/DQT encoding is generated by
IC403 and FM-modulated to the PLL reference signal. Since
the reference OSC does not modulate the loop characteris-
tic frequency or higher, modulation is performed at the VCO
side by adjusting the balance. (See Fig. 6)
the reference OSC does not modulate the loop characteris-
tic frequency or higher, modulation is performed at the VCO
side by adjusting the balance. (See Fig. 6)
PLL DATA
12.8MHz
REF OSC
I/M
I/N
PLL IC IC1
PHASE
COMPARATOR
CHARGE
PUMP
LPF
5kHz/6.25kHz
D1, 2
D3, 4
Q4
TX VCO
Q3
RX VCO
Q6
BUFF AMP
Q2
RF AMP
Q5, 7
T/R SW
5kHz/6.25kHz
MUTE
VR501
MAX
MAX
DEV
VR500
BALANCE
BALANCE
X1, IC1
D5, Q4
VCO
REFERENCE
OSC
(TCXO)
MIC
IC500 (1/2)
MIC
AMP
IC500 (1/2)
IDC
Q503
SW
SW
PRE-EMPHASIS
Q501, 502
LPF
(SPLATTER FILTER)
IC403
TO
QT/DQT
IC1
LD
PLL IC
D7
C1
R1
5C
IC403
UL
MPU