Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Ficha De Dados

286

Datasheet

Platform Reference Voltages at the top of 

 are specified at DC only. V

REF

 

measurements should be made with respect to the supply voltage. 

FSB_DVREF 
FSB_ACCVREF

Host Data, Address, and 
Common Clock Signal 
Reference Voltages

0.666 x 

VTT_FSB

 –2%

0.666 x 

VTT_FSB

0.666 x 

VTT_FSB 

+2%

V

FSB_SWING

Host Compensation 
Reference Voltage

0.25 x VTT_FSB 

–2%

0.25 x 

VTT_FSB

0.25 x 

VTT_FSB

+2%

V

CL_VREF

Controller Link Reference 
Voltage

0.270 x 

VCC_CL

0.279 x 

VCC_CL

0.287 x 

VCC_CL

V

DDR_VREF

DDR2 Reference Voltage

0.49 x 

VCC_DDR

0.50 x 

VCC_DDR

0.51 x

VCC_DDR

V

V

IL_H

Host GTL+ Input Low Voltage

-0.10

0

(0.666 x 

VTT_FSB) – 

0.1

 

V

V

IH_H

Host GTL+ Input High 
Voltage

(0.666 x 

VTT_FSB) + 0.1

 

VTT_FSB

VTT_FSB + 0.1

 V

V

OL_H

Host GTL+ Output Low 
Voltage

—

—

(0.25 x 

VTT_FSB) + 

0.1

V

V

OH_H

Host GTL+ Output High 
Voltage

VTT_FSB – 0.1

—

VTT_FSB

V

I

OL_H

Host GTL+ Output Low 
Current 

—

—

VTT_FSBmax *

(1–0.25) / 

Rttmin

mA

Rtt

min 

= 

47.5 Ω 

I

LEAK_H

Host GTL+ Input Leakage 
Current

—

—

45

μA

V

OL

<

Vpad<
Vtt_FSB

C

PAD

Host GTL+ Input Capacitance

2.0

—

2.5

pF

C

PCKG

Host GTL+ Input Capacitance 
(common clock)

0.90

—

2.5

pF

V

IL(DC) 

DDR2 Input Low Voltage

—

—

DDR_VREF

 

– 

0.125

V

V

IH(DC) 

DDR2 Input High Voltage

DDR_VREF

 

+ 

0.125

—

—

V

V

IL(AC) 

DDR2 Input Low Voltage

—

—

DDR_VREF

 

– 

0.20

V

V

IH(AC) 

DDR2 Input High Voltage

DDR_VREF

 

+ 

0.20

—

—

V

V

OL  

DDR2 Output Low Voltage

—

—

0.2 * 

VCC_DDR

V

1

V

OH 

DDR2 Output High Voltage

0.8 * VCC_DDR

—

—

V

1

I

Leak 

Input Leakage Current

—

—

±20

µA

4

I

Leak 

Input Leakage Current

—

—

±550

µA

5