Intel i3-3130M AW8063801111500 Manual Do Utilizador

Datasheet, Volume 1

89

1.

Unless otherwise noted, all specifications in this table apply to all processor frequencies.

2.

The V

CCIO

 referred to in these specifications refers to instantaneous V

CCIO

.

3.

For V

IN

 between “0” V and V

CCIO

. Measured when the driver is tri-stated.

4.

V

IH 

and V

OH 

may experience excursions above V

CCIO

. However, input signal drivers must comply with the 

signal quality specifications.

1.

Refer to the PCI Express Base Specification for more details.

2.

Low impedance defined during signaling. Parameter is captured for 5.0 GHz by RLTX-DIFF.

3.

DC impedance limits are needed to ensure Receiver detect. 

4.

The Rx DC Common Mode Impedance must be present when the Receiver terminations are first enabled to 

ensure that the Receiver Detect occurs properly. Compensation of this impedance can start immediately 

and the 15 Rx Common Mode Impedance (constrained by RLRX-CM to 50  ±20%) must be within the 

specified range by the time Detect is entered.

5.

COMP resistance must be provided on the system board with 1% resistors. 

6.

PEG_ICOMPO, PEG_ICOMPI, PEG_RCOMPO are the same resistor. Intel allows using 24.9  1% resistors.

V

IL

Input Low Voltage

—

V

CCIO

 * 0.3

V

2

V

IH

Input High Voltage

V

CCIO

 * 0.7

—

V

2, 4

V

OL

Output Low Voltage

—

V

CCIO

 * 0.1

V

2

V

OH

Output High Voltage

V

CCIO

 * 0.9

—

V

2, 4

R

ON

Buffer on Resistance

23

73



I

LI

Input Leakage Current

—

±200

A

3

Z

TX-DIFF-DC

DC Differential Tx Impedance (Gen

 1 

Only)

80

—

120



2

Z

TX-DIFF-DC

DC Differential Tx Impedance (Gen

 2 

and Gen 3)

—

—

120



2

Z

RX-DC

DC Common Mode Rx Impedance

40

—

60



3, 4

Z

RX-DIFF-DC

DC Differential Rx Impedance (Gen

 1 

Only)

80

—

120



PEG_ICOMPO

Comp Resistance

24.75

25

25.25



5, 6

PEG_ICOMPI

Comp Resistance

24.75

25

25.25



5, 6

PEG_RCOMPO

Comp Resistance

24.75

25

25.25



5, 6