Intel Phi 7120A SC7120A Ficha De Dados
Códigos do produto
SC7120A
Intel
®
Xeon Phi™ Coprocessor Datasheet
Document ID Number: 328209 003EN
56
When all cores have entered C1 Halt state, the coprocessor package can reduce the
core voltage and enter Deep-pC3. The fan (on active SKUs) can slow to minimum
speed. VRs enter low power mode.
core voltage and enter Deep-pC3. The fan (on active SKUs) can slow to minimum
speed. VRs enter low power mode.
From M1 state, memory can be put in self-refresh mode to enter the M2 state, further
reducing memory power.
reducing memory power.
Figure 5-4. All Cores In Package-C3 State; Memory In M1
Package C3 - Sleep
(all core clocks
gated)
Full bandwidth enabled
VR
VR
Fan
~20%
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
Figure 5-5. Package-C3 and Memory M2 state
Full bandwidth enabled
M2
M2
M2
M2
M2
M2
M2
M2
M2
M2
M2
M2
VR
VR
Fan
~20%
Package C3 - Sleep
(all core clocks
gated)