Intel SR1640TH SR1640THNA Manual Do Utilizador
Códigos do produto
SR1640THNA
Power Sub-System
Intel® Server System SR1640TH TPS
Revision
1.0
Intel order number: E94847-001
68
Table 65. +12V Over-Voltage Protection (OVP) requirement
Output Voltage
MIN
MAX
+12V +13.3V
+14.5V
3.6.3
Over-temperature Protection (OTP)
The power supply shall be protected against over temperature conditions caused by loss of
fan cooling or excessive ambient temperature. In an over temperature condition the PSU
shall be shutdown with the exception of the 5VSB output. The power supply shall alert the
system of the OTP condition via the power supply the fail LED indicator. The power supply
will auto recover from this condition, when the temperature is within specification again. In
case of a fan fail, the power supply will latch off.
Warning: 80° C (±6°)
Critical shut down: 90° C (±6°)
Re-start PSU: 75° C (±6°)
fan cooling or excessive ambient temperature. In an over temperature condition the PSU
shall be shutdown with the exception of the 5VSB output. The power supply shall alert the
system of the OTP condition via the power supply the fail LED indicator. The power supply
will auto recover from this condition, when the temperature is within specification again. In
case of a fan fail, the power supply will latch off.
Warning: 80° C (±6°)
Critical shut down: 90° C (±6°)
Re-start PSU: 75° C (±6°)
3.6.4
Thermal Fan Speed Control (External Control)
The power supply Fan shall be external control able through a HW pin on the connector.
This function allows overwriting the MCU Fan control due to thermal stress at the PDB. In
normal operation, the MCU controls the fan depending on Loading and internal temperature.
The Pin B3 (B/P-Fail) controls the internal Fan duty depending on voltage level recognized,
corresponding to below table.
This function allows overwriting the MCU Fan control due to thermal stress at the PDB. In
normal operation, the MCU controls the fan depending on Loading and internal temperature.
The Pin B3 (B/P-Fail) controls the internal Fan duty depending on voltage level recognized,
corresponding to below table.
Table 66. Fan control
Voltage @ Pin B3
Fan Duty
≤1.25V MCU
controlled
1.25V 50%
1.50V 60%
1.75V 70%
2.00V 80%
2.50V 100%
1.50V 60%
1.75V 70%
2.00V 80%
2.50V 100%
3.7 SMBus communication
The serial bus communication devices for MC and FRU data in the power supply shall be
compatible with both SMBus 2.0 “high power” and I2C Vdd based power and drive. This bus
shall operate at 5V. The SMBus pull-ups are located on the motherboard and shall be
connected to 5V.
compatible with both SMBus 2.0 “high power” and I2C Vdd based power and drive. This bus
shall operate at 5V. The SMBus pull-ups are located on the motherboard and shall be
connected to 5V.
Two pins are allocated on the power supply. One pin is the serial clock (SCL). The second
pin is used for serial data (SDA). Both pins are bi-directional and are used to form a serial
bus. The device(s) in the power supply shall be located at an address(s) determined by
addressing pins A0 and A1 on the power supply module. The circuits inside the power
supply shall derive their 5V power from the 5Vsb bus through a buffer. Device(s) shall be
powered from the system side of the 5VSB or’ing device. No pull-up resistors shall be on
SCL or SDA inside the power supply. The pull-up resistors should be located external to the
power supply on system/application side.
pin is used for serial data (SDA). Both pins are bi-directional and are used to form a serial
bus. The device(s) in the power supply shall be located at an address(s) determined by
addressing pins A0 and A1 on the power supply module. The circuits inside the power
supply shall derive their 5V power from the 5Vsb bus through a buffer. Device(s) shall be
powered from the system side of the 5VSB or’ing device. No pull-up resistors shall be on
SCL or SDA inside the power supply. The pull-up resistors should be located external to the
power supply on system/application side.