Intel 2 Duo E8200 BX80570E8200 Ficha De Dados

90

Datasheet

In response to entering Deeper Sleep, the processor drives the VID code corresponding 

to the Deeper Sleep core voltage on the VID pins. Unlike typical Dynamic VID changes 

(where the steps are single VID steps) the processor will perform a VID jump on the 

order of 100 mV. To support the Deeper Sleep State the platform must use a VRD 11.1 

compliant solution.

The processor supports Enhanced Intel SpeedStep Technology. This technology enables 

the processor to switch between frequency and voltage points, which may result in 

platform power savings. To support this technology, the system must support dynamic 

VID transitions. Switching between voltage/frequency states is software controlled. 

Note: Not all processors are capable of supporting Enhanced Intel SpeedStep 

Technology. More details on which processor frequencies will support this feature will be 

provided in future releases of the NDA Specification Update.

Enhanced Intel SpeedStep Technology is a technology that creates processor 

performance states (P states). P states are power consumption and capability states 

within the Normal state as shown in 

. Enhanced Intel SpeedStep Technology 

enables real-time dynamic switching between frequency and voltage points. It alters 

the performance of the processor by changing the bus to core frequency ratio and 

voltage. This allows the processor to run at different core frequencies and voltages to 

best serve the performance and power requirements of the processor and system. Note 

that the front side bus is not altered; only the internal core frequency is changed. In 

order to run at reduced power consumption, the voltage is altered in step with the bus 

ratio. 

The following are key features of Enhanced Intel SpeedStep Technology:

• Voltage/Frequency selection is software controlled by writing to processor MSR's 

(Model Specific Registers), thus eliminating chipset dependency.

— If the target frequency is higher than the current frequency, Vcc is incremented 

in steps (+12.5 mV) by placing a new value on the VID signals after which the 

processor shifts to the new frequency. Note that the top frequency for the 

processor can not be exceeded.

— If the target frequency is lower than the current frequency, the processor shifts 

to the new frequency and Vcc is then decremented in steps (-12.5 mV) by 

changing the target VID through the VID signals.