Freescale Semiconductor Tower System Module S12G240 TWR-S12G240 TWR-S12G240 Ficha De Dados
Códigos do produto
TWR-S12G240
128 KByte Flash Module (S12FTMRG128K1V1)
MC9S12G Family Reference Manual,
Rev.1.23
1060
Freescale Semiconductor
29.3.2.17 Flash Reserved5 Register (FRSV5)
This Flash register is reserved for factory testing.
All bits in the FRSV5 register read 0 and are not writable.
29.3.2.18 Flash Reserved6 Register (FRSV6)
This Flash register is reserved for factory testing.
All bits in the FRSV6 register read 0 and are not writable.
29.3.2.19 Flash Reserved7 Register (FRSV7)
This Flash register is reserved for factory testing.
Table 29-25. FOPT Field Descriptions
Field
Description
7–0
NV[7:0]
Nonvolatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the device user guide for proper
use of the NV bits.
use of the NV bits.
Offset Module Base + 0x0011
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 29-23. Flash Reserved5 Register (FRSV5)
Offset Module Base + 0x0012
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 29-24. Flash Reserved6 Register (FRSV6)