Freescale Semiconductor MSC8156 Evaluation Module MSC8156EVM MSC8156EVM Manual Do Utilizador
Códigos do produto
MSC8156EVM
MSC8156
Reference Manual, Rev. 2
15-46
Freescale
Semiconductor
High Speed Serial Interface (HSSI) Subsystem
15.8.19 Local Access Window Base Address Registers 0–9
(DnLAWBAR[0–9])
DnLAWBARx holds 24 most significant bits of the window base address. The least significant
byte is always 0s.
byte is always 0s.
describes the DnLAWBARx fields.
DnLAWBAR0
Local Access Window Base Address Registers 0–9
Offset 0x1C08
DnLAWBAR1
Offset 0x1C28
DnLAWBAR2
Offset 0x1C48
DnLAWBAR3
Offset 0x1C68
DnLAWBAR4
Offset 0x1C88
DnLAWBAR5
Offset 0x1CA8
DnLAWBAR6
Offset 0x1CC8
DnLAWBAR7
Offset 0x1CE8
DnLAWBAR8
Offset 0x1D08
DnLAWBAR9
Offset 0x1D28
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
—
BA
Type
R
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
BA
Type
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 15-23. DnLAWBARx Field Descriptions
Bits
Reset
Description
Setting
—
31–24
0
Reserved. Write to zero for future compatibility.
BA
23–0
0
Base Address
Holds the 24 most significant bits of the 36-bit
window base address.
• Bits 23–20 correspond to the value of
Holds the 24 most significant bits of the 36-bit
window base address.
• Bits 23–20 correspond to the value of
SATRx[ESAD]/DATRx[EDAD]
• Bits 19–0 correspond to bits 31–12 of
SARx[SAD]/DARx[DAD]
Note:
For local transactions, the most
significant 4 bits in this field must be 0s.
significant 4 bits in this field must be 0s.