Freescale Semiconductor MSC8156 Evaluation Module MSC8156EVM MSC8156EVM Manual Do Utilizador
Códigos do produto
MSC8156EVM
RapidIO Message Unit
MSC8156 Reference Manual, Rev. 2
Freescale Semiconductor
16-85
Message
response
response
Reserved tt
encoding
encoding
1
Error checking level: 3
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[TSE] is set
Status bit set: Illegal transaction target in the Logical/Transport Layer Error Detect
CSR LTLEDCSR[ITTE]. Transport size error in the Logical/Transport Layer Error
Detect CSR LTLEDCSR[TSE].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[TSE] is set
Status bit set: Illegal transaction target in the Logical/Transport Layer Error Detect
CSR LTLEDCSR[ITTE]. Transport size error in the Logical/Transport Layer Error
Detect CSR LTLEDCSR[TSE].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
2
Comments: Packet is ignored and discarded.
Message
response
response
Large transport size
when operating in
small transport size
or small transport
size when operating
in large transport
size
when operating in
small transport size
or small transport
size when operating
in large transport
size
1
Error checking level: 3
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[TSE] is set
Status bit set: Transport size error in the Logical/Transport Layer Error Detect CSR
LTLEDCSR[TSE].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[TSE] is set
Status bit set: Transport size error in the Logical/Transport Layer Error Detect CSR
LTLEDCSR[TSE].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
2
Comments: Packet is ignored and discarded. An error or illegal transaction target
error response is not generated.
error response is not generated.
Message
response
response
Illegal destination
ID
ID
1
Error checking level: 3
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[ITTE] is set
Status bit set: Illegal transaction target in the Logical/Transport Layer Error Detect
CSR LTLEDCSR[ITTE].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[ITTE] is set
Status bit set: Illegal transaction target in the Logical/Transport Layer Error Detect
CSR LTLEDCSR[ITTE].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
2
Comments: Packet is ignored and discarded.
Message
response
response
ttype (transaction
field) is not
message response
field) is not
message response
1
Error checking level: 3
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[ITD] is set
Status bit set: Illegal transaction decode in the Logical/Transport Layer Error
Detect CSR LTLEDCSR[ITD].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[ITD] is set
Status bit set: Illegal transaction decode in the Logical/Transport Layer Error
Detect CSR LTLEDCSR[ITD].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
2
Comments: Packet is ignored and discarded.
Message
response
response
Message response
received and no
outbound
mailboxes are
supported
received and no
outbound
mailboxes are
supported
1
Error checking level: 3
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[UR] is set
Status bit set: Unsupported transaction in the Logical/Transport Layer Error Detect
CSR LTLEDCSR[UR].
Message segment sent: No
Logical/Transport Layer Capture Register: Updated with the packet.
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[UR] is set
Status bit set: Unsupported transaction in the Logical/Transport Layer Error Detect
CSR LTLEDCSR[UR].
Message segment sent: No
Logical/Transport Layer Capture Register: Updated with the packet.
2
Comments: Packet is ignored and discarded.
Message
response
response
Reserved response
status (not done,
retry, or error)
status (not done,
retry, or error)
Error checking level: 4a
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[ITD] is set.
Status bit set: Illegal transaction decode in the Logical/Transport Layer Error
Detect CSR LTLEDCSR[ITD].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[ITD] is set.
Status bit set: Illegal transaction decode in the Logical/Transport Layer Error
Detect CSR LTLEDCSR[ITD].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
2
Comments: Packet is ignored and discarded.
Message
response
response
Message response
packet size is
incorrect
packet size is
incorrect
Error checking level: 4a
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[ITD] is set.
Status bit set: Message format error in the Logical/Transport Layer Error Detect
CSR LTLEDCSR[ITD].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
Interrupt generated: Serial RapidIO error/write-port if LTLEECSR[ITD] is set.
Status bit set: Message format error in the Logical/Transport Layer Error Detect
CSR LTLEDCSR[ITD].
Message segment sent: Yes
Logical/Transport Layer Capture Register: Updated with the packet.
2
Comments: Packet is ignored and discarded.
Table 16-25. Outbound Message Direct Mode Hardware Errors
Transaction
Error
Description