Freescale Semiconductor MSC8156 Evaluation Module MSC8156EVM MSC8156EVM Manual Do Utilizador
Códigos do produto
MSC8156EVM
MSC8156 Reference Manual, Rev. 2
16-116
Freescale
Semiconductor
Serial RapidIO Controller
to the appropriate doorbell queue entry. If the priority of the new doorbell is higher than
that of the previous doorbell memory writes that have not completed, the doorbell
controller generates a retry.
that of the previous doorbell memory writes that have not completed, the doorbell
controller generates a retry.
5.
An inbound doorbell interrupt is generated to the local processor because the number of
doorbells in the queue is greater than or equal to the configured doorbell-in-queue
threshold (IDMR[DIQ_THRESH) and this event is enabled to generate the interrupt
(IDMR[DIQIE]).
doorbells in the queue is greater than or equal to the configured doorbell-in-queue
threshold (IDMR[DIQ_THRESH) and this event is enabled to generate the interrupt
(IDMR[DIQIE]).
6.
Software determines that the doorbell-in-queue event caused the interrupt by detecting
that the doorbell-in-queue interrupt bit is set in the doorbell status register
(IDSR[DIQI]).
that the doorbell-in-queue interrupt bit is set in the doorbell status register
(IDSR[DIQI]).
7.
Software processes the doorbell queue entry to which the doorbell queue dequeue
pointer address register (DQDPAR) is pointing.
pointer address register (DQDPAR) is pointing.
8.
Software increments the dequeue pointer address register (DQDPAR) by setting the
doorbell increment bit (IDMR[DI]).
doorbell increment bit (IDMR[DI]).
9.
Software determines whether there are more doorbells to process by reading the queue
empty bit (IDSR[QE]). If the queue is not empty, the previous two steps are repeated.
empty bit (IDSR[QE]). If the queue is not empty, the previous two steps are repeated.
10.
Software clears the doorbell-in-queue interrupt bit (IDSR[DIQI]) by writing a 1 to it.
16.4.4.1 Doorbell Queue Entry Format
Each doorbell entry in the queue has two 32-bit words, one for target information (see Table
16-38) and one for source information (see Table 16-39). The target information is stored
because a RapidIO port can be configured to accept packets from any destination. When there are
multiple RapidIO ports on one device, each port can be configured with a different destination
ID. For the MSC8156, the target information is identical for all received doorbell entries.
16-38) and one for source information (see Table 16-39). The target information is stored
because a RapidIO port can be configured to accept packets from any destination. When there are
multiple RapidIO ports on one device, each port can be configured with a different destination
ID. For the MSC8156, the target information is identical for all received doorbell entries.
Table 16-38. Inbound Doorbell Target Info Definition
Bit
Name
Description
31–16
—
Reserved.
15–8
ETID
Extended target ID in Large Transport mode.
Reserved for Small Transport mode.
Reserved for Small Transport mode.
7–0
TID
Target ID field from the received doorbell packet.
Table 16-39. Source Info Definition
Bit
Name
Description
31–24
ESID
Extended source ID in Large Transport mode.
Reserved fir Small Transport mode.
Reserved fir Small Transport mode.
23–16
SID
Source ID field from the received doorbell packet.
15–8
INFO MSB
Most significant byte of the info field from the received doorbell packet.
7–0
INFO LSB
Least significant byte of the info field from the received doorbell packet.