Linear Technology LTC2263-14 14-Bit, 25Msps, 1.8V Dual Serial ADC, 5MHz DC1532A-F Ficha De Dados

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dc1532f

DEMO MANUAL DC1532

If your generator cannot deliver full scale signals without 

distortion, you may benefit from a medium power amplifier 

based on a Gallium Arsenide Gain block prior to the final 

filter. This is particularly true at higher frequencies where 

IC based operational amplifiers may be unable to deliver 

the combination of low noise figure and High IP3 point 

required. A high order filter can be used prior to this final 

amplifier, and a relatively lower Q filter used between the 

amplifier and the demo circuit.
Apply the analog input signal of interest to the SMA connec-

tors on the DC1532 demonstration circuit board marked J3 

AIN1, J4 AIN2, J6 AIN3, J7 AIN4. These inputs correspond 

with channels 1-4 of the ADC respectively. These inputs 

are capacitive coupled to balun transformers ETC1-1-13.

Encode Clock
NOTE: Apply an encode clock to the SMA connector on 

the DC1532 demonstration circuit board marked J11  

CLK+. As a default the DC1532 is populated to have a 

single-ended input. 
For the best noise performance, the ENCODE INPUT must 

be driven with a very low jitter, square wave source. The 

amplitude should be large, up to 3V

P-P

 or 13dBm. When 

using a sinusoidal signal generator a squaring circuit can 

be used. Linear Technology also provides demo board 

DC1075A that divides a high frequency sine wave by four, 

producing a low jitter square wave for best results with 

the LTC2268.
Using bandpass filters on the clock and the analog input will 

improve the noise performance by reducing the wideband 

noise power of the signals. In the case of the DC1532 a 

bandpass filter used for the clock should be used prior 

to the DC1075A. Data sheet FFT plots are taken with 10 

pole LC filters made by TTE (Los Angeles, CA) to suppress 

signal generator harmonics, non harmonically related 

spurs and broadband noise. Low phase noise Agilent 

8644B generators are used for both the Clock input and 

the Analog input.

Digital Outputs
Data outputs. data clock, and frame clock signals are 

available on J1 of the DC1532. This connector follows the 

VITA-57/FMC standard, but all signals should be verified 

when using an FMC carrier card other than the DC1371.

Software
The DC1371 is controlled by the PScope™ System Soft-

ware provided or downloaded from the Linear Technology 

website at http://www.linear.com/software/. 
To start the data collection software if PScope.exe is in-

stalled (by default) in \Program Files\LTC\PScope\, double 

click the PScope Icon or bring up the run window under 

the start menu and browse to the PScope directory and 

select PScope. 
If the DC1532 demonstration circuit is properly connected 

to the DC1371, PScope should automatically detect the 

DC1532, and configure itself accordingly. 
If everything is hooked up properly, powered and a suitable 

convert clock is present, clicking the Collect button should 

result in time and frequency plots displayed in the PScope 

window. Additional information and help for PScope is 

available in the DC1371A Quick Start Guide and in the 

online help available within the PScope program itself.