Renesas M32R-FPU Manual Do Utilizador

3

3-72

M32R-FPU Software Manual (Rev.1.01)

DSP function instruction

Multiply and add

accumulator +=  (  ( signed ) Rsrc1 * ( signed short ) Rsrc2  ) ;

MACWLO multiplies the 32 bits of Rsrc1 and the low-order 16 bits of Rsrc2, then adds the

result to the low-order 56 bits in the accumulator.

The LSB of the multiplication result is aligned with the LSB of the accumulator, and the portion

corresponding to bits 8 through 15 of the accumulator is sign-extended before the addition.  The

result of the addition is stored in the accumulator. The 32 bits Rsrc1 and the low-order 16 bits of

Rsrc2 are treated as signed values.

The condition bit (C) is unchanged.

None

Rsrc1

32 bits

Rsrc2

low-order 16 bits

x

0

15 16

31

+

0

15 16

31 32

47 48

63

7 8

Result of the multiplication

Value in accumulator before the
execution of the MACWLO instruction

Value in accumulator after the
execution of the MACWLO instruction

Sign extension

Sign extension

INSTRUCTIONS

3.2 Instruction description