Renesas M32R-FPU Manual Do Utilizador

2

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M32R-FPU Software Manual (Rev.1.01)

2.2 Instruction format

There are two major instruction formats: two 16-bit instructions packed together within a

word boundary, and a single 32-bit instruction (see Figure 2.2.1).  Figure 2.2.2 shows

the instruction format of M32R CPU.

Fig. 2.2.2 Instruction format of M32R CPU

Fig. 2.2.1 16-bit instruction and 32-bit instruction

< 16-bit instruction >

op1

R

1

R

2

op2

op1

R

1

c

op1

cond

c

op1

R

1

R

2

op2

c

op1

R

1

R

2

op2

c

op1

R

1

c

op1

cond

c

< 32-bit instruction >

R

1

 = R

1

   op   R

2

R

1

 = R

1

   op   c

Branch (Short Displacement)

R

1

 = R

1

   op   c

Branch

Compare and Branch

R

1

 = R

2

   op   c

op1

R

s

0000

op2

op3

R

d

0000

op4

op1

R

s1

R

s2

op2

Floating-point 2-operand
(R

d

=op(R

s

))

Floating-point 3-operand
(R

d

=R

s

1 op R

s

2)

op3

R

d

0000

op4

 16-bit instruction A

+ 0

+ 1

+ 2

+ 3

1 word

32-bit instruction

address

1 word

+ 0

+ 1

+ 2

+ 3

address

 16-bit instruction B

INSTRUCTION SET

2.2 Instruction format