Ficha De Dados (489-BBBZ)índice analítico1 Introduction71.1 Reference Documentation7Table 1-1. Related Documents71.2 Conventions and Terminology71.2.1 Terminology7Table 1-2. General Terminology72 Intel® Xeon Phi™ Coprocessor Architecture92.1 Intel® Xeon Phi™ Coprocessor Product Overview9Figure 2-1. Intel® Xeon Phi™ Coprocessor Board Schematic92.1.1 Intel® Xeon Phi™ Coprocessor Board Design10Figure 2-2. Intel® Xeon Phi™ Coprocessor Board Top side (for reference only)11Figure 2-3. Intel® Xeon Phi™ Coprocessor Board, Back side (reference only)11Note: Figure 2-2 and 2-3 are representative of the final Intel® Xeon Phi™ Coprocessor board without the package thermal and mechanical solution.112.1.2 System Management Controller (SMC)112.1.3 Intel® Xeon Phi™ Coprocessor Silicon12Figure 2-4. Intel® Xeon Phi™ Coprocessor Silicon Layout122.1.4 Intel® Xeon Phi™ Coprocessor Product Family13Table 2-1. Intel® Xeon Phi™ Coprocessor Product Family132.1.5 Intel® Xeon Phi™ Coprocessor 7120D/5120D(Dense Form Factor)13Figure 2-5. 7120D/5120D Dense Form Factor, Topside143 Thermal and Mechanical Specification153.1 Mechanical Specifications15Table 3-1. Intel® Xeon Phi™ Coprocessor Mechanical Specification15Figure 3-1 Location of Mounting Holes on the Intel® Xeon Phi™ Coprocessor Card (in mils)16Figure 3-2 Dimensions of the Intel® Xeon Phi™ Coprocessor Card (in mils)173.2 Intel® Xeon Phi™ Coprocessor Thermal Specification18Table 3-2. Intel® Xeon Phi™ Coprocessor Thermal Specification183.2.1 Intel® Xeon Phi™ Coprocessor Thermal Management18Figure 3-3 Entering and Exiting Thermal Throttling (PROCHOT)193.3 Intel® Xeon Phi™ Coprocessor Thermal Solutions193.3.1 3120A and 7120A Active Cooling Solution20Figure 3-4 Exploded View of 3120A / 7120A Active Solution203.3.2 7120P/SE10P/5110P/3120P/31S1P Passive Cooling Solution21Figure 3-5 Exploded View of Passive Thermal Solution213.3.2.1 System Airflow for 5110P SKUs21Note: For systems with reversed airflow, the corresponding airflow requirement is expected to be within +/-5% tolerance of the values shown in the following tables.213.3.2.2 Airflow Requirement for SE10P/7120P/3120P/31S1P Passive Cooling Solution22Figure 3-6 Airflow Requirement vs. 45oC Inlet Temperature for the 5110P at 225W TDP23Figure 3-7 Airflow Requirement vs. Inlet Temperature for the 31S1P at 270W TDP and SE10P/7120P/3120P at 300W TDP24Figure 3-8 Airflow Requirement vs. Inlet Temperature for the 5110P Card at 245W TDP253.4 Cooling Solution Guidelines for SE10X/7120X and 7120D/5120D263.4.1 Thermal Considerations26Figure 3-9 SE10X/7120X Power Profile for Coprocessor Intensive Workload (all values in Watts)26Figure 3-10 SE10X/7120X Power Profile for Memory Intensive Workload (all values in Watts)27Figure 3-11 5120D Power Profile: Coprocessor Centric (all values in Watts)28Figure 3-12 5120D Power Profile: Memory Centric (all values in Watts)29Figure 3-13 7120D Power Profile: Coprocessor Centric (all values in Watts)30Figure 3-14 7120D Power Profile: Memory Centric (all values in Watts)31Table 3-3. Component Thermal Specification on SE10X/7120X and 7120D/5120D323.4.1.1 VR Temperature and Thermal Throttling32Figure 3-15 7120D/5120D VR Thermal Sensors for Custom Cooling Consideration323.4.2 Thermal Profile and Cooling33Figure 3-16 SE10X/7120X SKU Coprocessor Junction Temperature (Tjunction) vs Power33Figure 3-17 SE10X/7120X SKU Coprocessor Case Temperature (Tcase) vs Power343.4.3 Mechanical Considerations35Table 3-4. Board Component Heights35Figure 3-18 SE10X/7120X Board Top Side36Figure 3-19 SE10X/7120X Board Bottom Side37Figure 3-20 7120D/5120D Board Top Side38Figure 3-21 7120D/5120D Board Bottom Side393.4.4 Mechanical Shock and Vibration Testing39Table 3-5. Dynamic Load Shift Specification393.5 Intel® Xeon Phi™ Coprocessor PCI Express* Card Extender Bracket Installation40Note: The SE10X/7120X and 7120D/5120D SKUs are not shipped with the extender bracket.40Figure 3-22 Contents of Intel® Xeon Phi™ Coprocessor Package Shipment403.5.1 Bracket Installation Steps411. Determine Lid Type.41Figure 3-23 Overlap Lid41Figure 3-24 Clearance Lid412. Remove Overlap Lid.42a. Remove 2 of the M3x6mm screws retaining the lid, as shown in Figure 3-25.42Figure 3-25 Overlap Lid Removal42b. Remove Lid. Take care not to bend tabs, as shown in Figure 3-26.42Figure 3-26 Tilt Overlap Lid and Slide as shown to Disengage Tabs423. Install OEM Bracket.43a. Insert the OEM bracket into the Intel® Xeon Phi™ coprocessor card assembly, as shown in Figure 3-27.43Figure 3-27 OEM Bracket Installation43b. Install (4) M3 x 6mm Flat Head Screws; torque = 6inch-lbs, shown in Figure 3- 28.43Figure 3-28 OEM Bracket Installation434. Replace Lid on “Overlap Lid” Units Only44a. Insert tabs into slots in card assembly, shown in Figure 3-29.44Figure 3-29 Replace Lid on “Overlap Lid” Units44b. Install the lid’s screws (M3 x 6mm Flat head); torque = 6 inch-lbs, shown in Figure 3-30.44Figure 3-30 Replace Lid on “Overlap Lid” Units (cont.)444 Intel® Xeon Phi™ Coprocessor Pin Descriptions454.1 PCI Express* Signals45Table 4-1. PCI Express* Connector Signals on the Intel® Xeon Phi™ Coprocessor454.1.1 PROCHOT_N (Pin B12)464.2 Supplemental Power Connector(s)474.3 Dense Form Factor (5120D) Edge Connector Pins47Table 4-2. 5120D (DFF) SKU Pinout484.3.1 Baseboard Requirements of 5120D51Table 4-3. 51xxD Power Rail Requirements on Baseboard514.3.2 AC Coupling on 5120D Data Pins515 Power Specification and Management53Table 5-1. Intel® Xeon Phi™ Coprocessor Power States535.1 5110P SKU Power Options535.2 Intel® Xeon Phi™ Coprocessor Power States54Figure 5-1. Coprocessor in C0-state and Memory in M0-state54Note: No application is expected to dissipate maximum power from cores and memory simultaneously.54Figure 5-2. Some cores are in C0-state and other cores in C1-state; Memory in M0-state55Figure 5-3. All Cores In C1 state; Memory In M1 state55Figure 5-4. All Cores In Package-C3 State; Memory In M156Figure 5-5. Package-C3 and Memory M2 state56Figure 5-6. Package-C6 and Memory M2 state57Figure 5-7. Package-C6 and Memory M3 state575.3 P-states and Turbo Mode57Figure 5-8. Intel® Xeon Phi™ coprocessor P-States and Turbo596 Manageability616.1 Intel® Xeon Phi™ Coprocessor Manageability Architecture616.2 System Management Controller (SMC)61Figure 6-1 Intel® Xeon Phi™ Coprocessor System Manageability Architecture626.3 General SMC Features and Capabilities636.3.1 Catastrophic Shutdown Detection636.4 Host / In-Band Management Interface (SCIF)646.5 System and Power Management656.6 Out of Band / PCI Express* SMBus / IPMB Management Capabilities666.6.1 IPMB Protocol676.6.2 Polled Master-Only Protocol676.6.2.1 Polled Master-Only Protocol Clarifications676.6.2.2 SMBus Write and Read Block Command Numbers686.6.2.3 Write Description68Table 6-1. SMBus Write Commands68Figure 6-1. Write Block Command Diagram686.6.2.4 Read Description69Figure 6-2. Read Block Command Diagram696.6.3 Supported IPMI Commands696.6.3.1 Miscellaneous Commands69Table 6-2. Miscellaneous Command Details696.6.3.2 FRU Related Commands69Table 6-3. FRU Related Command Details696.6.3.3 SDR Related Commands70Table 6-4. SDR Related Command Details706.6.3.4 SEL Related Commands70Table 6-5. SEL Related Command Details706.6.3.5 Sensor Related Commands70Table 6-6. Sensor Related Command Details706.6.3.6 General Commands71Table 6-7. General Command Details716.6.3.6.1 CPU Package Configuration Read71Table 6-8. CPU Package Config Read Request Format71Table 6-9. CPU Package Config Read Response Format716.6.3.6.2 CPU Package Configuration Write72Table 6-10. CPU Package Config Write Request Format72Table 6-11. CPU Package Config Write Response Format726.6.3.6.3 Set SM Signal72Table 6-12. Set SM Signal Request Format (Continued)72Table 6-13. Set SM Signal Response Format736.6.3.7 OEM Commands73Table 6-14. OEM Command Details736.6.3.7.1 OEM Set Fan PWM Adder73Table 6-15. Set Fan PWM Adder Command Request Format73Table 6-16. Set Fan PWM Adder Command Response Format746.6.3.7.2 OEM Get POST Register74Table 6-17. Get POST Register Request Format74Table 6-18. Get POST Register Response Format746.6.3.7.3 OEM Assert Forced Throttle74Table 6-19. Assert Forced Throttle Request Format74Table 6-20. Assert Forced Throttle Response Format746.6.3.7.4 OEM Enable External Throttle74Table 6-21. Enable External Throttle Request Format75Table 6-22. Enable External Throttle Response Format756.6.3.7.5 OEM Get Throttle Reason75Table 6-23. OEM Get Throttle Reason Request Format75Table 6-24. OEM Get Throttle Reason Response Format756.6.3.8 Other IPMI Related Information75Table 6-25. Table of Sensors766.6.3.9 SMC IPMI Discrete Sensors776.6.3.9.1 Sensor Status77Table 6-26. Status Sensor Report Format776.7 SMC LED_ERROR and Fan PWM78Table 6-27. LED Indicators78Tamanho: 7 MBPáginas: 78Language: EnglishAbrir o manual