Manual Do Utilizadoríndice analíticoGPIB-1014 User Manual1Important Information3Limited Warranty3Copyright3Trademarks3Warning4FCC/DOC Radio Frequency Interference Compliance5Table of Contents6About This Manual12Organization of This Manual12Conventions Used in This Manual13Related Documentation13Customer Communication14Chapter 1 Introduction15What Your Kit Should Contain17Optional Equipment17Unpacking18Chapter 2 General Description19Electrical Characteristics19VMEbus Characteristics20VMEbus Slave-Addressing20VMEbus Slave-Data21VMEbus Master-Direct Memory Access23Interrupter24Data Transfer Bus (DTB) Requester25VMEbus Modules Not Provided25Diagnostic Aids25Data Transfer Features25Programmed I/O Transfers26GPIB-1014 Functional Description26Chapter 3 Configuration and Installation34Configuration34Access Mode36Base Address36Set Base Address Using Jumper Block W137Set Base Address Using Compare Address Lines37DMA Address Modifier Code Output38Other Configuration Parameters40Installation40Verification of System Compatibility40Cabling43Verification Testing43Chapter 4 Register Bit Descriptions44Register Map44Register Sizes45Register Description45Register Description Format46Interface Registers47Data In Register (DIR)50Command/Data Out Register (CDOR)51Interrupt Status Register 1 (ISR1)52Interrupt Mask Register 1 (IMR1)52Interrupt Status Register 2 (ISR2)58Interrupt Mask Register 2 (IMR2)58Serial Poll Status Register (SPSR)63Serial Poll Mode Register (SPMR)63Address Status Register (ADSR)64Address Mode Register (ADMR)66Command Pass Through Register (CPTR)69Auxiliary Mode Register (AUXMR)71Hidden Registers77Internal Counter Register (ICR)78Parallel Poll Register (PPR)79Auxiliary Register A (AUXRA)81Auxiliary Register B (AUXRB)83Auxiliary Register E (AUXRE)85Address Register 0 (ADR0)86Address Register (ADR)87Address Register 1 (ADR1)88End of String Register (EOSR)89DMA Registers90Address Registers92Transfer Count Registers93Function Code Registers94Device Control Register95Operation Control Register97Sequence Control Register99Channel Control Register100Channel Status Register102Channel Error Register104Channel Priority Register105Interrupt Vector Registers106General Control Register107Configuration Registers108Configuration Register 1 (CFG1)108Configuration Register 2 (CFG2)110Chapter 5 Programming Considerations112Initialization112The GPIB-1014 as GPIB Controller114Becoming Controller-In-Charge (CIC) and Active Controller114Sending Remote Multiline Messages (Commands)115Going from Active to Standby Controller115Going from Standby to Active Controller115Going from Active to Idle Controller116The GPIB-1014 as GPIB Talker and Listener117Programmed Implementation of Talker and Listener117Addressed Implementation of the Talker and Listener117Address Mode 1117Address Mode 2118Address Mode 3118Sending/Receiving Messages119Using Direct Memory Access119DMA Transfers without the Carry Cycle121DMA Transfers with the Carry Cycle124Polling During DMAs128Sending END or EOS128Terminating the Transfer and Checking the Result128Terminating on END or EOS130Using Programmed I/O131Sending and Receiving Data131Sending END or EOS131Terminating on END or EOS131Interrupts132Serial Polls134Conducting a Serial Poll134Responding to a Serial Poll134Parallel Polls134Conducting a Parallel Poll135Responding to a Parallel Poll136Chapter 6 Theory of Operation137VMEbus Interface137Data Lines137Slave Read and Write Transfers137DMA Transfers137Control Signals138Address138Control Equations of Transceivers139Address Decoding139Clock and Reset Circuitry140Configuration Registers141Configuration Register 1141Configuration Register 2143Timing State Machine143Slave Cycles143DMA Cycles144DMA Gating and Control145Interrupter146DTB Requester and Controller146GPIB Synchronization and Interrupt Control14968450 DMAC152DMAC Channel Operation152Initialization and Transfer Phases152Block Termination157GPIB Interface162Test and Troubleshooting163DMA Stand-Alone Testing163GPIB Interface Testing163Chapter 7 Diagnostic and Troubleshooting Test Procedures165Interpreting Test Procedures165GPIB-1014 Hardware Installation Tests166Appendix A Hardware Specifications174Appendix B Parts List and Schematic Diagrams176Appendix C Sample Programs177Appendix D Multiline Interface Messages198Appendix E Operation of the GPIB201Types of Messages201Talkers, Listeners, and Controllers201The Controller-In-Charge and System Controller202GPIB Signals and Lines202Data Lines202Handshake Lines202NRFD (not ready for data)203NDAC (not data accepted)203DAV (data valid)203Interface Management Lines203ATN (attention)203IFC (interface clear)203REN (remote enable)203SRQ (service request)203EOI (end or identify)203Physical and Electrical Characteristics204Configuration Requirements206Related Documents207Appendix F Mnemonics Key208Appendix G Customer Communication219Glossary224Index225Figures10Figure 1-1. GPIB-1014 Interface Board16Figure 2-1. GPIB-1014 with a VMEbus Computer27Figure 2-2. GPIB-1014 in a Multiprocessor Application28Figure 2-3. GPIB-1014 Block Diagram29Figure 3-1. Parts Locator Diagram35Figure 3-2. Access Mode After RESET36Figure 3-3. Configuration for GPIB-1014 Base Address 2000 (hex)37Figure 3-4. Default Settings of AM Code Jumpers W3, W4, and W538Figure 4-1. Interface Registers48Figure 4-2. Writing to the Hidden Registers49Figure 4-3. DMA Register Memory Map91Figure 5-1. DMA Transfer without Carry Cycle121Figure 5-2. DMA Transfer with Carry Cycle124Figure 6-1. DTB Requester and Controller Flip-Flop Operations147Figure 6-2. Array Format for Array Chaining Modes159Figure 6-3. Array Format for Linked Chaining Modes160Figure E-1. The GPIB Connector and Signal Assignments204Figure E-2. Linear Configuration205Figure E-3. Star Configuration206Tables11Table 2-1. GPIB-1014 Signals19Table 2-2. mPD7210 Internal GPIB Interface Registers21Table 2-3. 68450 Internal DMA Registers22Table 2-4. GPIB-1014 Configuration Registers23Table 2-5. GPIB-1014 IEEE 488 Interface Capabilities31Table 2-6. GPIB-1014 IEEE 1014 Interrupter Compliance Levels33Table 3-1. Programming Values for Default Settings of W3, W4, and W539Table 3-2. Setting the Address Modifier Code Bits (AM5-AM0)39Table 3-3. GPIB-1014 Pin Assignment on VMEbus Connector P141Table 3-4. GPIB-1014 Pin Assignment on VMEbus Connector P242Table 4-1. GPIB-1014 Register Map44Table 4-2. Clues to Understanding Mnemonics46Table 4-3. Multiline GPIB Commands Recognized by the mPD721069Table 4-4. Auxiliary Command Summary72Table 4-5. Auxiliary Commands: Detail Description73Table 4-6. Examples for Configuring the PPR80Table 4-7. DMAC DMA Channel Register Set90Table 6-1. Control Equations of Transceivers139Table A-1. Electrical Characteristics174Table A-2. Environmental Characteristics174Table A-3. Physical Characteristics175Tamanho: 600 KBPáginas: 246Language: EnglishAbrir o manual