Справочник Пользователя для Intel Server Board S5500HCV S5500HCVR

The BIOS creates entries in the Multi-Processor Specification, Version 1.4 tables to describe 
multi-core processors. 

Direct Cache Access (DCA) is a system-level protocol in a multi-processor system to improve 
I/O network performance, thereby providing higher system performance. The basic idea is to 
minimize cache misses when a demand read is executed. This is accomplished by placing the 
data from the I/O devices directly into the processor cache through hints to the processor to 
perform a data pre-fetch and install it in its local caches.  

The BIOS setup provides an option to enable or disable this feature. The default behavior is 
enabled. 

The server boards comply with Unified Retention System (URS) and Unified Backplate 
Assembly. The server boards ship with Unified Backplate Assembly at each processor socket.  

The URS retention transfers load to the server boards via the Unified Backplate Assembly. The 
URS spring, captive in the heatsink, provides the necessary compressive load for the thermal 
interface material (TIM). All components of the URS heatsink solution are captive to the 
heatsink and only require a Phillips* screwdriver to attach to the Unified Backplate Assembly. 
See the following figure for the stacking order of URS components. 

The Unified Backplate Assembly is removable, allowing for the use of non-Intel

®

 heatsink 

retention solutions.