Справочник Пользователя для Philips S1D13505
Epson Research and Development
Page 97
Vancouver Design Center
Hardware Functional Specification
S1D13505
Issue Date: 01/02/02
X23A-A-001-14
7.5.11 CRT Timing
Figure 7-44: CRT Timing
VDP
= Vertical Display Period
= (REG[09h] bits [1:0], REG[08h] bits [7:0]) + 1
VNDP
= Vertical Non-Display Period
= (REG[0Ah] bits [5:0]) + 1
HDP
= Horizontal Display Period
= ((REG[04h] bits [6:0]) + 1)*8Ts
HNDP
= Horizontal Non-Display Period
= HNDP
1
+ HNDP
2
= ((REG[05h] bits [4:0]) + 1)*8Ts
Note
The signals RED, GREEN and BLUE are analog signals from the embedded DAC and represent
the color components which make up each pixel.
the color components which make up each pixel.
VRTC
HRTC
LINE1
LINE480
1-1
1-2
1-640
HRTC
RED,GREEN,BLUE
RED,GREEN,BLUE
VDP
HDP
VNDP
HNDP
1
Example Timing for 640x480 CRT
HNDP
2
LINE480