Справочник Пользователя для Philips S1D13505
Page 14
Epson Research and Development
Vancouver Design Center
S1D13505
Interfacing to the PC Card Bus
X23A-G-005-06
Issue Date: 01/02/05
The following diagram shows a typical implementation of the PC Card to S1D13505
interface.
interface.
Figure 4-1: Typical Implementation of PC Card to S1D13505 Interface
WE0#
RD#
DB[15:0]
WAIT#
BUSCLK
S1D13505
RESET#
AB[20:0]
-OE
D[15:0]
WAIT#
A[21:0]
PC Card socket
15K
CLKI
Oscillator
WE1#
RD/WR#
M/R#
CS#
-WE
-CE1
-CE2
-CE2
RESET
A21
BS#
V
DD
A[20:0]
Note:
When connecting the S1D13505 RESET# pin, the system designer should be aware of all
conditions that may reset the S1D13505 (e.g. CPU reset can be asserted during wake-up
from power-down modes, or during debug states).
When connecting the S1D13505 RESET# pin, the system designer should be aware of all
conditions that may reset the S1D13505 (e.g. CPU reset can be asserted during wake-up
from power-down modes, or during debug states).