Справочник Пользователя для Philips S1D13505

Philips

Epson Research and Development

Page 5

Vancouver Design Center

Interfacing to the NEC VR4121™ Microprocessor

S1D13505

Issue Date: 01/02/05

X23A-G-011-04

List of Tables

Table 3-1: Host Bus Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 4-1: Summary of Power-On-Reset Options . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

List of Figures

Figure 2-1: NEC VR4121 Read/Write Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 4-1: NEC VR4121 to S1D13505 Configuration Schematic . . . . . . . . . . . . . . . . . . . 12