Справочник Пользователя для Philips S1D13505
Epson Research and Development
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Vancouver Design Center
Interfacing to the NEC V832™ Microprocessor
S1D13505
Issue Date: 01/02/05
X23A-G-012-02
4.4 Memory Mapping and Aliasing
The CSn line selected determines the address range to be reserved for the S1D13505. The
table below summarizes the S1D13505 address mapping.
table below summarizes the S1D13505 address mapping.
Each address range is 16M bytes, therefore, the S1D13505 is aliased four times over the
address range.
address range.
Table 4-3: NEC
V
832 IO Address Range For Each CSn Line
CSn Line
NEC V832 IO Address
S1D13505 Function
CS3
0300 0000h
to
03FF FFFFh
0300 0000h
Registers
0320 0000h
Display buffer (2M bytes)
CS4
0400 0000h
to
04FF FFFFh
0400 0000h
Registers
0420 0000h
Display buffer (2M bytes)
CS5
0500 0000h
to
05FF FFFFh
0500 0000h
Registers
0520 0000h
Display buffer (2M bytes)
CS6
0600 0000h
to
06FF FFFFh
0600 0000h
Registers
0620 0000h
Display buffer (2M bytes)