Справочник Пользователя для Intel SE7520JR2
Intel® Server Board SE7520JR2
Error Reporting and Handling
Revision 1.0
C78844-002
171
Diagnostic LED Decoder
G=Green, R=Red, A=Amber
Checkpoint
MSB
LSB
Description
D4
R
A
OFF
R
Test base 512KB memory. Adjust policies and cache first 8MB. Set
stack.
stack.
D5
R
A
OFF
A
Bootblock code is copied from ROM to lower system memory and
control is given to it. BIOS now executes out of RAM.
control is given to it. BIOS now executes out of RAM.
D6
R
A
G
R
Both key sequence and OEM specific method is checked to determine
if BIOS recovery is forced. Main BIOS checksum is tested. If BIOS
recovery is necessary, control flows to checkpoint E0. See Bootblock
Recovery Code Checkpoints section of document for more
information.
if BIOS recovery is forced. Main BIOS checksum is tested. If BIOS
recovery is necessary, control flows to checkpoint E0. See Bootblock
Recovery Code Checkpoints section of document for more
information.
D7
R
A
G
A
Restore CPUID value back into register. The Bootblock-Runtime
interface module is moved to system memory and control is given to
it. Determine whether to execute serial flash.
interface module is moved to system memory and control is given to
it. Determine whether to execute serial flash.
D8
A
R
OFF
R
The Runtime module is uncompressed into memory. CPUID
information is stored in memory.
information is stored in memory.
D9
A
R
OFF
A
Store the Uncompressed pointer for future use in PMM. Copying Main
BIOS into memory. Leaves all RAM below 1MB Read-Write including
E000 and F000 shadow areas but closing SMRAM.
BIOS into memory. Leaves all RAM below 1MB Read-Write including
E000 and F000 shadow areas but closing SMRAM.
DA
A
R
G
R
Restore CPUID value back into register. Give control to BIOS POST
(ExecutePOSTKernel). See POST Code Checkpoints section of
document for more information.
(ExecutePOSTKernel). See POST Code Checkpoints section of
document for more information.
6.5.5
Bootblock Recovery Code Checkpoint
The Bootblock recovery code gets control when the BIOS determines that a BIOS recovery
needs to occur because the user has forced the update or the BIOS checksum is corrupt. The
following table describes the type of checkpoints that may occur during the Bootblock recovery
portion of the BIOS:
needs to occur because the user has forced the update or the BIOS checksum is corrupt. The
following table describes the type of checkpoints that may occur during the Bootblock recovery
portion of the BIOS:
Table 77: Bootblock Recovery Code Checkpoint
Diagnostic LED Decoder
G=Green, R=Red, A=Amber
Checkpoint
MSB
LSB
Description
E0
R
R
R
OFF
Initialize the floppy controller in the super I/O. Some interrupt vectors
are initialized. DMA controller is initialized. 8259 interrupt controller is
initialized. L1 cache is enabled.
are initialized. DMA controller is initialized. 8259 interrupt controller is
initialized. L1 cache is enabled.
E9
A
R
R
G
Set up floppy controller and data. Attempt to read from floppy.
Determine information about root directory of recovery media.
Determine information about root directory of recovery media.
EA
A
R
A
OFF
Enable ATAPI hardware. Attempt to read from ARMD and ATAPI CD-
ROM. Determine information about root directory of recovery media.
ROM. Determine information about root directory of recovery media.
EB
A
R
A
G
Disable ATAPI hardware. Jump back to checkpoint E9.
EF
A
A
A
G
Read error occurred on media. Jump back to checkpoint EB.
F0
R
R
R
R
Search for pre-defined recovery file name in root directory.
F1
R
R
R
A
Recovery file not found.
F2
R R A R
Start reading FAT table and analyze FAT to find the clusters occupied
by the recovery file.
by the recovery file.
F3
R
R
A
A
Start reading the recovery file cluster by cluster.
F5
R
A
R
A
Disable L1 cache.