Справочник Пользователя для Intel S3420GP
IntelP®P Server Board S3420GP TPS
Connector/Header Locations and Pin-outs
6.5 I/O
Connectors
6.5.1 VGA
Connector
The following table details the pin-out definition of the VGA connector (J7A1).
Table 40. VGA Connector Pin-out (J7A1)
Pin
Sig
me
nal Na
Description
1
V_IO_R_C
Red (analog color signal R)
ONN
2
V_IO_G_C
Green (analog color signal G)
ONN
3
V_IO
Blue (analog color signal B)
_B_CONN
4 TP_VID_CONN_B4
No
onnec
c
tion
5 GND
G
nd
rou
6 GND
G
nd
rou
7 GN
G
nd
D
rou
8 GND
d
Groun
9 TP_VID_CONN_B9
nn
No
co ection
10 GND
Ground
11
ID_CONN_B11
No
connection
TP_V
12 V_IO_DDCD
AT
AT
DDCD
13
V_IO_HSYNC_CONN
C
ync)
HSYN (horizontal s
14
V_IO_VSYNC_CONN
VSYNC
)
(vertical sync
15 V_IO_DDCCLK
DDCCLK
6.5.
IC and U
onnector
The server board provides two stacked RJ-45 / 2xUSB connectors side-by-side on the back
edge of the board (J6A1, J5A1). The pin-out for NIC connectors are identical and defined in the
follo
edge of the board (J6A1, J5A1). The pin-out for NIC connectors are identical and defined in the
follo
tab
Table 41. RJ-
100/1000 NI
nne
-out (
2
Rear N
SB c
wing
le.
45 10/
C Co
ctor Pin
J5A1)
Pin
Signal Name
Pin
Signal Name
1 P5V_USB_PWR75
H_11
2
USB_PC
_FB_DN
3 USB_PCH_11_F
B_DP
4
GND
5 5V_
B_DN
P
USB_PWR75
6
USB_PCH_10_F
7 SB_
U
PCH_10_FB_DP
8
GND
9 P1V9_LAN2_R
DIP<0
10
NIC2_M
>
11 NIC2_MDIN<0>
DIP<1
12
NIC2_M
>
13 NIC2_MDIN<1>
DIP<2>
14
NIC2_M
15
NIC2_MDIN<2>
DIP<3>
16
NIC2_M
17
N
3
>
18 GND
IC2_MDIN<
19
ED_
UX
L
NIC2_1
20
P3V3_A
21 LED_NIC2_LINK100_R_0
IC2_LINK1000_2
22 LED_N
Table 42. RJ-45 10/100/1000 NIC Connector Pin-out (J6A1)
Revision 1.0
Intel order number E65697-003
71