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DISK DRIVE OPERATION
SpinPoint V40 Product Manual
95
Table 6-18 Multiword DMA data transfer
Multiword DMA timing parameters
Mode 0
ns
Mode 1
ns
Mode 2
ns
Note
t
0
Cycle time
(min)
480
150
120
see note
t
D
DIOR-/DIOW-
(min)
215
80
70
see
note
t
E
DIOR- data access
(max)
150
60
50
t
F
DIOR- data hold
(min)
5
5
5
t
G
DIOR-/DIOW- data setup
(min)
100
30
20
t
H
DIOW- data hold
(min)
20
15
10
t
I
DMACK to DIOR-/DIOW- setup
(min)
0
0
0
t
J
DIOR-/DIOW- to DMACK hold
(min)
20
5
5
t
KR
DIOR- negated pulse width
(min)
50
50
25
see note
t
KW
DIOW- negated pulse width
(min)
215
50
25
see note
t
LR
DIOR- to DMARQ delay
(max)
120
40
35
t
LW
DIOW- to DMARQ delay
(max)
40
40
35
t
M
CS(1:0) valid to DIOR-/DIOW-
(min)
50
30
25
t
N
CS(1:0)
hold
(min)
15
10
10
t
Z
DMACK- to tri-state
(max)
20
25
25
NOTE
−
t
0
is the minimum total cycle time, t
D
is the minimum command active time, and t
K
(t
KR
or t
KW
, as appropriate)
is the minimum command recovery time or command inactive time. The actual cycle time equals the sum of the actual
command active time and the actual command inactive time. The three timing requirements of t
command active time and the actual command inactive time. The three timing requirements of t
0
, t
D
, t
K
shall be met.
The minimum total cycle time requirement, t
0
, is greater than the sum of t
D
and t
K
. This means a host implementation
may lengthen either or both t
D
or t
K
to ensure that t
0
is equal to the value reported in the devices IDENTIFY DEVICE
data. A device implementation shall support any legal host implementation.