Справочник Пользователя для Samsung 3.5" hard disk drives

Скачать
Страница из 115
DISK DRIVE OPERATION 
 
SpinPoint V40 Product Manual
 
41
 
6.2.3.8 
DMACK- (DMA Acknowledge) 
 
This signal shall be used by the host in response to DMARQ to either acknowledge that data has been 
accepted, or that data is available. 
 
6.2.3.9 
DMARQ (DMA Request) 
 
This signal, used for DMA data transfers between host and drive, shall be asserted by the drive when it is 
ready to transfer data to or from the host. The direction of data transfer is controlled by DIOR- and DIOW-. 
The signal is used in handshake manner with DMACK- (i.e., the drive shall wait until the host asserts 
DMACK- before negating DMARQ and re-asserting DMARQ if there is more data to transfer). 
 
When a DMA operation is enabled, IOCS16- and CSIFX- shall not be asserted and transfers shall be 16-bits 
wide. 
 
6.2.3.10 
INTRQ (Drive Interrupt) 
 
This signal is used to interrupt the host system. INTRQ is asserted only when the drive has a pending 
interrupt, the drive is selected, and the host has cleared nIEN in the Device Control register. If nIEN=1, or the 
drive is not selected, this output is in a high impedance state, regardless of the presence or absence of a 
pending interrupt. 
 
INTRQ is negated by: 
 
  Assertion of RESET- or 
  The setting of SRST of the Device Control register, or 
  The host writing to the Command register, or 
  The host reading from the Status register.  
 
On PIO transfers, INTRQ is asserted at the beginning of each data block to be transferred. A data block is 
typically a single sector, except when declared otherwise by use of the Set Multiple command. An exception 
occurs on Format Track, Write Sector(s), Write Buffer, and Write Long commands: INTRQ shall not be 
asserted at the beginning of the first data block to be transferred. 
 
6.2.3.11 
IOCS16- (Drive 16-bit I/O) 
 
IOCS16- indicates to the host system that the 16-bit data port has been addressed and that the drive is ready 
to send or receive a 16-bit word. This is an open collector output. 
 
  When transferring in PIO mode, if IOCS16- is not asserted, DD0-7 is used for 8-bit transfers. 
  When transferring in PIO mode, if IOCS16- is asserted, DD0-15 is used for 16-bit data transfers.