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CHAPTER 41: CAN
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: CAN
FUJITSU SEMICONDUCTOR CONFIDENTIAL
86
5.7.2. Silent Mode
Silent mode is shown.
The CAN controller enters silent mode when the Silent bit of the CAN test register (TESTR) is set to "1".
In silent mode, the CAN controller can receive data frames and remote frames, but only outputs a recessive
level to the CAN bus and does not send messages or ACKs.
When the CAN controller is requested to send a dominant bit (the ACK bit, overload flag, or active error
flag), it sends the dominant bit to the RX end through a loopback circuit within the CAN controller. During
this operation, the receiving end can receive the dominant bit that is sent through the loopback circuit within
the CAN controller even if the CAN bus is in the recessive-level state.
In silent mode, traffic over the CAN bus can be analyzed without influence from the transmission of
dominant bits (ACK bits and error flags).
The figure below shows how signals CAN_TX and CAN_RX are connected to the CAN controller in silent
mode:
Figure 5-6 CAN Controller in Silent Mode
CAN_TX
CAN_RX
CAN controller
= 1
Tx
Rx
CAN Core
MB91520 Series
MN705-00010-1v0-E
1779