Справочник Пользователя для AMD LX 900@1.5W
142
AMD Geode™ LX Processors Data Book
CPU Core Register Descriptions
33234H
5.5.2.37 WB Stage Instruction Pointer MSR (WB_IP_MSR)
WB_IP_MSR provides access to the WB stage instruction pointer (effective address).
5.5.2.38 EX Stage Linear Instruction Pointer MSR (EX_LIP_MSR)
EX_LIP_MSR provides access to the EX stage linear instruction pointer.
MSR Address
00001361h
Type
R/W
Reset Value
00000000_00000000h
WB_IP_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
WB_IP
WB_IP_MSR Bit Descriptions
Bit
Name
Description
63:32
RSVD
Reserved.
31:0
WB_IP
WB Stage Effective Instruction Pointer.
MSR Address
00001364h
Type
RO
Reset Value
00000000_00000000h
EX_LIP_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
EX_LIP
EX_LIP_MSR Bit Descriptions
Bit
Name
Description
63:32
RSVD
Reserved.
31:0
EX_LIP
EX Stage Linear Instruction Pointer.