Справочник Пользователя для AMD LX 800@0.9W
AMD Geode™ LX Processors Data Book
133
CPU Core Register Descriptions
33234H
5.5.2.25 DMM Header MSR (DMM_HDR_MSR)
DMM_HDR_MSR provides access to the address register that controls where DMI data is written.
MSR Address
0000132Ch
Type
R/W
Reset Value
00000000_00000000h
DMM_HDR_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
DMM_HDR
DMM_HDR_MSR Bit Descriptions
Bit
Name
Description
63:32
RSVD
Reserved. Write as read.
31:0
DMM_HDR
DMM Header. Address that indicates where DMI data is written. DMI data is written at
lower addresses than DMM_HDR (negative offsets).
lower addresses than DMM_HDR (negative offsets).