Справочник Пользователя для Samsung S3C2440A
THUMB INSTRUCTION SET
S3C2440A RISC MICROPROCESSOR
4-2
FORMAT SUMMARY
The THUMB instruction set formats are shown in the following figure.
Move Shifted register
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
0
L
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
0
0
L
1
0
R
1
1
0
1
0
SP
1
L
L
S
H
0
0
1
B
L
0
1
H
0
1
B
0
0
1
1
1
I
Op
Op
Op
Op
Op
L
0
S
1
Offset5
Rs
Rd
Rn/offset3
Rd
Rs
Rd
Offset8
Rs
Rd/Hd
Rd
H1 H2
Rs/Hs
Rd
Word8
Rd
Rb
Ro
Ro
Rb
Rd
Offset5
Rb
Rd
Rb
Rd
Offset5
Rd
Rd
Word8
Word8
SWord7
Rb
Cond
Rlist
Rlist
Softset8
Value8
Offset11
Offset
Add/subtract
Move/compare/add/
subtract immediate
subtract immediate
ALU operations
Hi register operations
/branch exchange
/branch exchange
PC-relative load
Load/store with register
offset
offset
Load/store with immediate
offset
offset
Load/store sign-extended
byte/halfword
byte/halfword
Load/store halfword
SP-relative load/store
Load address
Add offset to stack pointer
Push/pop register
Multiple load/store
Conditional branch
Software interrupt
Unconditional branch
Long branch with link
15 14 13 12 11 10
9
8
7
6
5
4
2
3
1
0
15 14 13 12 11 10
9
8
7
6
5
4
2
3
1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Figure 4-1. THUMB Instruction Set Formats