Справочник Пользователя для Silicon Image SSD-H16G(I)-3500
ATA C
OMMAND
B
LOCK
AND
S
ET
D
ESCRIPTION
SSD-H
XXX
(I)-3500 D
ATA
S
HEET
S
ILICON
S
YSTEMS
P
ROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
3500H-03DSR
P
AGE
38
F
EBRUARY
2, 2009
Idle Immediate — 95h, E1h
When issued by the host, the device’s internal controller sets the BSY bit,
enters Idle Mode, clears the BSY bit, and issues an interrupt. The interrupt is
issued whether or not the Idle mode is fully entered.
When issued by the host, the device’s internal controller sets the BSY bit,
enters Idle Mode, clears the BSY bit, and issues an interrupt. The interrupt is
issued whether or not the Idle mode is fully entered.
Table 38: Idle Immediate — 95h, E1h
Register
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Feature
X
Sector Count
X
Sector Number
X
Cylinder Low
X
Cylinder High
X
Drive Head
X
X
X
Drive
X
Command
95h or E1h