Справочник Пользователя для Intel D425 AU80610006252AA
Модели
AU80610006252AA
Processor Configuration Registers
14
Datasheet
Compatible SMRAM Address Range (A_0000h-B_FFFFh)
When compatible SMM space is enabled, SMM-mode CPU accesses to this range are
routed to physical system DRAM at 000A 0000h - 000B FFFFh. Non-SMM-mode CPU
routed to physical system DRAM at 000A 0000h - 000B FFFFh. Non-SMM-mode CPU
accesses to this range are considered to be to the Video Buffer Area as described
above. DMI originated cycles to enable SMM space are not allowed and are considered
above. DMI originated cycles to enable SMM space are not allowed and are considered
to be to the Video Buffer Area if IGD is not enabled as the VGA device.
Monochrome Adapter (MDA) Range (B_0000h-B_7FFFh)
Legacy support requires the ability to have a second graphics controller
(monochrome) in the system. Accesses in the standard VGA range are forwarded to
(monochrome) in the system. Accesses in the standard VGA range are forwarded to
IGD or the DMI Interface (depending on configuration bits). Since the monochrome
adapter may be mapped to anyone of these devices, the IMC must decode cycles in
adapter may be mapped to anyone of these devices, the IMC must decode cycles in
the MDA range (000B_0000h - 000B_7FFFh) and forward either to IGD or the DMI
Interface. This capability is controlled by a VGA steering bits. In addition to the
memory range B0000h to B7FFFh, the IMC decodes IO cycles at 3B4h, 3B5h, 3B8h,
memory range B0000h to B7FFFh, the IMC decodes IO cycles at 3B4h, 3B5h, 3B8h,
3B9h, 3BAh and 3BFh and forwards them to the either IGD and/or the DMI Interface.
1.2.1.3
Expansion Area (C_0000h-D_FFFFh)
This 128 KByte ISA Expansion region (000C_0000h – 000D_FFFFh) is divided into
eight 16 KB segments. Each segment can be assigned one of four Read/Write states:
eight 16 KB segments. Each segment can be assigned one of four Read/Write states:
read-only, write-only, read/write, or disabled. Typically, these blocks are mapped
through IMC and are subtractive decoded to ISA space. Memory that is disabled is not
remapped.
remapped.
Non-snooped accesses from DMI to this region are always sent to DRAM. This
complies with a Colusa DCN.
complies with a Colusa DCN.
Table 1-1. Expansion Area Memory Segments
Memory Segments
Attributes
Comments
0C0000H
WE RE
Add-on BIOS
0C4000H
WE RE
Add-on BIOS
0C8000H
WE RE
Add-on BIOS
0CC000H
WE RE
Add-on BIOS
0D0000H
WE RE
Add-on BIOS
0D4000H
WE RE
Add-on BIOS
0D8000H
WE RE
Add-on BIOS
0DC000H
WE RE
Add-on BIOS
1.2.1.4
Extended System BIOS Area (E_0000h-E_FFFFh)
This 64 KByte area (000E_0000h – 000E_FFFFh) is divided into four 16 KByte
segments. Each segment can be assigned independent read and write attributes so it
segments. Each segment can be assigned independent read and write attributes so it
can be mapped either to main DRAM or to DMI Interface. Typically, this area is used
for RAM or ROM. Memory segments that are disabled are not remapped elsewhere.