Справочник Пользователя для National Instruments NI PXIe-6672

Jitter added to CLKIN

Without PLL....................................0.5 ps

rms

, 10 Hz to 100 kHz, 

typical

With PLL .........................................0.6 ps

rms

, 10 Hz to 100 kHz, 

typical

Duty cycle distortion of CLKIN to 
PXI_CLK10_IN without PLL ................±1%, max

Required input duty cycle 
when using PLL......................................45 to 55%

Output frequency

From PXI_CLK10 ...........................10 MHz

From TCXO.....................................10 MHz

From DDS .......................................1 MHz

1

 to 105 MHz

Duty cycle...............................................43 to 55%

2

Output impedance...................................50

Ω, nominal

Output coupling ......................................AC

Amplitude, software configurable to two voltage levels 
(low and high drive)

1   

The lower limit is load dependent because of the AC coupling. This limit is less than 1 MHz for high-impedance loads.

2   

The duty cycle specification covers both DDS range and TCXO.

Low Drive

2.0 V

p-p

, typical

High Drive

5.0 V

p-p

, typical

Ω Load

Low Drive

1.0 V

p-p

, typical

High Drive

2.5 V

p-p

, typical