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Appendix A
Specifications
©
National Instruments Corporation
A-7
Digital logic levels
Power-on state ....................................Input (High-Z)
Data transfers ......................................Programmed I/O
Timing I/O
Number of channels ............................2 up/down counter/timers,
1 frequency scaler
Resolution
Counter/timers .............................24 bits
Frequency scaler ..........................4 bits
Compatibility ......................................TTL/CMOS
Base clocks available
Counter/timers .............................20 MHz, 100 kHz
Frequency scaler ..........................10 MHz, 100 kHz
Base clock accuracy ............................±0.01%
Max source frequency .........................20 MHz
Min source pulse duration ..................10 ns, edge-detect mode
Min gate pulse duration .....................10 ns, edge-detect mode
Level
Min
Max
Input low voltage
Input high voltage
Input low current (V
in
= 0 V)
Input high current (V
in
= 5 V)
0.0 V
2.0 V
—
—
0.8 V
5.0 V
–320 µA
10 µA
Output low voltage (I
OL
= 24 mA)
Output high voltage (I
OH
= 13 mA)
—
4.35 V
0.4 V
—
PCI_E.book Page 7 Thursday, June 25, 1998 12:55 PM