Справочник Пользователя для Hynix 8GB DDR3 PC3-8500 HMT41GS6MFR8C-PB

DDR3 SDRAM will support two Vih/Vil AC levels for DDR3-800 and DDR3-1066

 

as specified in the table 

below. DDR3 SDRAM will also support corresponding tDS values (Table 43 and Table 51 in “ DDR3 Device 

Operation”) as well as derating tables in Table 46 of “DDR3 Device Operation” depending on Vih/Vil AC lev-
els.

Notes:
1. Vref = VrefDQ (DC).
2. Refer to "Overshoot and Undershoot Specifications" on page 27.
3. The ac peak noise on V

Ref

 may not allow V

Ref

 to deviate from V

RefDQ(DC)

 by more than +/-1% VDD (for 

reference: approx. +/- 15 mV).
4. For reference: approx. VDD/2 +/- 15 mV.
5. VIH(dc) is used as a simplified symbol for VIH.DQ(DC100)
6. VIL(dc) is used as a simplified symbol for VIL.DQ(DC100)
7. VIH(ac) is used as simplified symbol for VIH.DQ(AC175), VIH.DQ(AC150), and VIH.DQ(AC135); 

VIH.DQ(AC175) value is used when Vref + 0.175V is referenced, VIH.DQ(AC150) value is used when Vref 

+ 0.150V is referenced, and VIH.DQ(AC135) value is used when Vref + 0.135V is referenced.
8. VIL(ac) is used as simplified symbol for VIL.DQ(AC175), VIL.DQ(AC150), and VIL.DQ(AC135); 

VIL.DQ(AC175) value is used when Vref - 0.175V is referenced, VIL.DQ(AC150) value is used when Vref - 

0.150V is referenced, and VIL.DQ(AC135) value is used when Vref - 0.135V is referenced.

VIH.DQ(DC100)

DC input logic high

Vref + 0.100

VDD

Vref + 0.100

VDD

V

1, 5

VIL.DQ(DC100)

DC input logic low

VSS

Vref - 0.100

VSS

Vref - 0.100

V

1, 6

VIH.DQ(AC175)

AC input logic high

Vref + 0.175

Note2

-

-

V

1, 2, 7

VIL.DQ(AC175)

AC input logic low

Note2

Vref - 0.175

-

-

V

1, 2, 8

VIH.DQ(AC150)

AC Input logic high

Vref + 0.150

Note2

Vref + 0.150

Note2

V

1, 2, 7

VIL.DQ(AC150)

AC input logic low

Note2

Vref - 0.150

Note2

Vref - 0.150

V

1, 2, 8

VIH.CA(AC135)

AC input logic high

-

-

-

-

V

1, 2, 7

VIL.CA(AC135)

AC input logic low

-

-

-

-

V

1, 2, 8

V

RefDQ(DC

)

Reference Voltage for DQ, 

DM inputs

0.49 * VDD 0.51 * VDD 0.49 * VDD 0.51 * VDD

V

3, 4