Техническая Спецификация для Microchip Technology DM183037
2012 Microchip Technology Inc.
DS30575A-page 467
PIC18F97J94 FAMILY
The BUFM bit (ADCON2L<1>) controls how the buffer
is filled. When BUFM is '1', the buffer is split into two
equal halves: a lower half (ADCBUF0 through
ADCBUF[(n/2) - 1]) and an upper half (ADCBUF[n/2]
through ADCBUFn), where n is the number of available
analog channels (both internal and external). The
buffers will alternately receive the conversion results
after each interrupt event. The initial buffer used after
BUFM is set is the lower group.
When BUFM is '0', the entire buffer is used for all
conversion sequences.
is filled. When BUFM is '1', the buffer is split into two
equal halves: a lower half (ADCBUF0 through
ADCBUF[(n/2) - 1]) and an upper half (ADCBUF[n/2]
through ADCBUFn), where n is the number of available
analog channels (both internal and external). The
buffers will alternately receive the conversion results
after each interrupt event. The initial buffer used after
BUFM is set is the lower group.
When BUFM is '0', the entire buffer is used for all
conversion sequences.
The decision to use the split buffer feature will depend
upon how much time is available to move the buffer
contents after the interrupt, as determined by the
application. If the application can quickly unload a full
buffer within the time it takes to sample and convert one
channel, the BUFM bit can be '0', and up to 16 conver-
sions may be done per interrupt. The application will
have one sample/convert time before the first buffer
location is overwritten.
If the processor cannot unload the buffer within the
sample and conversion time, the BUFM bit should be
'1'. For example, if SMPI<4:0> = 00111, then eight
conversions will be loaded into the lower half of the
buffer, following which, an interrupt may occur. The
next eight conversions will be loaded into the upper half
of the buffer. The processor will, therefore, have the
entire time between interrupts to move the eight
conversions out of the buffer.
upon how much time is available to move the buffer
contents after the interrupt, as determined by the
application. If the application can quickly unload a full
buffer within the time it takes to sample and convert one
channel, the BUFM bit can be '0', and up to 16 conver-
sions may be done per interrupt. The application will
have one sample/convert time before the first buffer
location is overwritten.
If the processor cannot unload the buffer within the
sample and conversion time, the BUFM bit should be
'1'. For example, if SMPI<4:0> = 00111, then eight
conversions will be loaded into the lower half of the
buffer, following which, an interrupt may occur. The
next eight conversions will be loaded into the upper half
of the buffer. The processor will, therefore, have the
entire time between interrupts to move the eight
conversions out of the buffer.
22.6.2.2
Buffer Fill Status
When the conversion result buffer is split (BUFM = 1),
the BUFS status bit (ADCON2L<7>) indicates which
half of the buffer that the A/D Converter is currently writ-
ing. If BUFS = 0, the A/D Converter is filling the lower
group and the user application should read conversion
values from the upper group. If BUFS = 1, the situation
is reversed, and the user application should read
conversion values from the lower group.
the BUFS status bit (ADCON2L<7>) indicates which
half of the buffer that the A/D Converter is currently writ-
ing. If BUFS = 0, the A/D Converter is filling the lower
group and the user application should read conversion
values from the upper group. If BUFS = 1, the situation
is reversed, and the user application should read
conversion values from the lower group.
22.6.2.3
Channel Indexed Mode
When BUFREGEN = 1, FIFO operation is disabled. In
this Fill mode, the conversion result for each channel is
written only to the buffer location that corresponds to
that channel. For example, any conversions performed
on AN0 are stored only in ADCBUF0. The same holds
true for AN1 and ADCBUF1, and so on. Subsequent
conversions on a particular channel that occur, prior to
an interrupt, will result in any previous data in that
location being overwritten.
Channel Indexed mode is particularly useful when used
with the Threshold Detect feature, as this allows the
user to easily test for a particular condition on a specific
analog channel without creating an excess of CPU
overhead. This is covered in more detail in
this Fill mode, the conversion result for each channel is
written only to the buffer location that corresponds to
that channel. For example, any conversions performed
on AN0 are stored only in ADCBUF0. The same holds
true for AN1 and ADCBUF1, and so on. Subsequent
conversions on a particular channel that occur, prior to
an interrupt, will result in any previous data in that
location being overwritten.
Channel Indexed mode is particularly useful when used
with the Threshold Detect feature, as this allows the
user to easily test for a particular condition on a specific
analog channel without creating an excess of CPU
overhead. This is covered in more detail in
.
22.6.3
BUFFER DATA FORMATS
The results of each A/D conversion are 12 bits wide
(optionally, 10 bits wide in some devices). To maintain
data format compatibility, the result of each conversion
is automatically converted to one of four selectable,
16-bit formats. The FORM<1:0> bits (ADCON1H<1:0>)
select the format.
(optionally, 10 bits wide in some devices). To maintain
data format compatibility, the result of each conversion
is automatically converted to one of four selectable,
16-bit formats. The FORM<1:0> bits (ADCON1H<1:0>)
select the format.
and
show
the data output formats that can be selected.
through
show the numerical
equivalents for the various conversion result codes.
FIGURE 22-10:
A/D OUTPUT DATA FORMATS (12-BIT)
Note:
When the BUFM bit is set, the user
should not program the SMPIx bits to a
value that specifies more than (n/2)
conversions per interrupt.
should not program the SMPIx bits to a
value that specifies more than (n/2)
conversions per interrupt.
RAM Contents:
d11 d10 d09 d08 d07 d06 d05 d04 d03 d02 d01 d00
Read to Bus:
Integer
0
0
0
0
d11 d10 d09 d08 d07 d06 d05 d04 d03 d02 d01 d00
Signed Integer
d11 d11 d11 d11 d11 d10 d09 d08 d07 d06 d05 d04 d03 d02 d01 d00
Fractional (1.15)
d11 d10 d09 d08 d07 d06 d05 d04 d03 d02 d01 d00
0
0
0
0
Signed Fractional (1.15)
d11 d10 d09 d08 d07 d06 d05 d04 d03 d02 d01 d00
0
0
0
0