Техническая Спецификация для Microchip Technology DM183037
PIC18F97J94 FAMILY
DS30575A-page 74
2012 Microchip Technology Inc.
TABLE 4-7:
DELAY TIMES FOR EXITING RETENTION DEEP SLEEP MODE
Clock Source
Exit Delay
Oscillator Delay
Notes
EC
T
RETR
+ T
PM
—
ECPLL
T
RETR
+ T
PM
T
LOCK
MS, HS
T
RETR
+ T
PM
T
OST
MSPLL, HSPLL
T
RETR
+ T
PM
T
OST
+ T
LOCK
SOSC
Off during Sleep
T
RETR
+ T
PM
T
OST
On during Sleep
T
RETR
+ T
PM
—
FRC, FRCDIV
T
RETR
+ T
PM
T
FRC
LPRC:
Off during Sleep
T
RETR
+ T
PM
T
LPRC
On during Sleep
T
RETR
+ T
PM
—
FRCPLL
T
RETR
+ T
PM
T
LOCK
Note 1: T
PM
= Start-up delay for program memory stabilization; applicable only when IPEN (RCON<7>) = 0.
2: T
RETR
= Retention regulator start-up delay.
3: T
OST
= Oscillator Start-up Timer (OST); a delay of 1024 oscillator periods before the oscillator clock is
released to the system.
4: T
LOCK
= PLL lock time.
5: T
FRC
and T
LPRC
= RC Oscillator start-up times.
6: T
FLASH
= Flash program memory ready delay. Setting the PMSLP bit will provide a faster wake-up.