Техническая Спецификация для Freescale Semiconductor Accelerometer Cube Demo MMA9559LKUBE MMA9559LKUBE

Sensors

10

Freescale Semiconductor, Inc.

This section provides a brief description of the various pin functions available on the MMA955xL platform. Ten of the device pins 
are multiplexed with Rapid GPIO (RGPIO) functions. The “Pin Function #1” column in 

 lists which function is 

active when the hardware exits the Reset state. Freescale or user firmware can use the pin mux-control registers in the System 
Integration Module (SIM) to change pin assignments for each pin after reset. For detailed information about these registers, see 
the MMA955xL Three-Axis Accelerometer Reference Manual (MMA955xLRM).

: Digital power and ground. V

DD

 is nominally 1.8 V.

: Analog power and ground. V

DDA

 is nominally 1.8 V. To optimize performance, the V

DDA

 line can be filtered to 

remove any digital noise that can be present on the 1.8 V supply. (See 

Figure 5

 and 

.)

RESETB: The RESETB pin is an open-drain, bidirectional pin with an internal, weak, pullup resistor. At start-up, it is configured 
as an input pin, but also can be programmed to become bidirectional. Using this feature, the MMA955xL device can reset external 
devices for any purpose other than power-on reset. Reset must be pulled high at power up to boot to Application code space.  If 
low, it will boot to ROM code. After startup, Reset may be asserted to reset the device. The total external capacitance to ground 
has to be limited when using RESETB-pin, output-drive capability. For more details, see the “System Integration Module” chapter 
of the MMA955xL Three-Axis Accelerometer Reference Manual (MMA955xLRM).

C port: SDA0 and SCL0: These are the slave-I

2

C data and clock signals, respectively. The MMA955xL device can be 

controlled via the serial port or via the slave SPI interface.

C: SDA1 and SCL1: These are the master-I

2

C clock and data signals, respectively. 

Analog-to-Digital Conversion: AN0, AN1: The on-chip ADC can be used to perform a differential, analog-to-digital conversion 
based on the voltage present across pins AN0(-) and AN1(+). Conversions for these pins are at the same Output Data Rate 
(ODR) as the MEMS transducer signals. Input levels are limited to 1.8 V differential.

Rapid General Purpose I/O: RGPIO[9:0]: The ColdFire V1 CPU has a feature called Rapid GPIO (RGPIO). This is a 16-bit, 
input/output port with single-cycle write, set, clear, and toggle functions available to the CPU. The MMA955xL device brings out 
the lower 10 bits of that port as pins of the device. At reset, All of the RGPIO pins are configured as input pins, although pin mux-
ing does reassign some pins to non-RGPIO function blocks.  Pull-ups are disabled.

RGPIO[9] is connected to BKGD/MS.

RGPIO[1:0]  SDA0 and SCL0 are connected at reset.

Interrupts: INT: This input pin can be used to wake the CPU from a deep-sleep mode. It can be programmed to trigger on either 
rising or falling edge, or high or low level. This pin operates as a Level-7 (high-priority) interrupt.

Debug/Mode Control: BKGD/MS: At start-up, this pin operates as mode select. If this pin is pulled high during start up, the CPU 
will boot normally and run code. If this pin is pulled low during start-up, the CPU will boot into active Background-Debug Mode 
(BDM). In BDM, this pin operates as a bidirectional, single-wire, background-debug port. It can be used by development tools for 
downloading code into on-chip RAM and flash and to debug that code. There is an internal pullup resistor on this pin.  It may be 
left floating.

Timer: PDB_A and PDB_B: These are the two outputs of the programmable delay block.

Slave SPI Interface: SCLK, SDI, SDO and SSB: These pins control the slave SPI clock, data in, data out, and slave-select 
signals, respectively. The MMA955xL platform can be controlled via this serial port or via the slave-I

2

C interface. SBB has a spe-

cial function at startup that selects the Slave interface mode. Low at startup selects SPI and high selects I

2

C.

INT_O: The slave-port output interrupt pin. This pin can be used to flag the host when a response to a command is available to 
read on the slave port.

TPMCH0 and TPMCH1: The I/O pin associated with 16-bit, TPM channel 0 and 1.

An internal circuit powered by V

DDA

 provides the device with a power-on-reset signal. In order for this signal to be properly rec-

ognized, it is important that V

DD

 is powered up before or simultaneously with V

DDA

. The voltage potential between V

DD

 and V

DDA

 

must not be allowed to exceed the value specified in 

.

•

Provide a low-impedance path from the board power supply to each power pin (V

DD

 and V

DDA

) on the device and from the 

board ground to each ground pin (V

SS

 and V

SSA

).