Техническая Спецификация для Freescale Semiconductor Accelerometer Cube Demo MMA9559LKUBE MMA9559LKUBE

Sensors
Freescale Semiconductor, Inc.

11

•

Place 0.01 to 0.1 µF capacitors as close as possible to the package supply pins to meet the minimum bypass requirement. 
The recommended bypass configuration is to place one bypass capacitor on each of the V

DD

/V

SS

 pairs. V

DDA

/V

SSA

 ceramic 

and tantalum capacitors tend to provide better tolerances.

•

Ensure that capacitor leads and associated printed-circuit traces that connect to the chip V

DD

 and V

SS

 (GND) pins are as 

short as possible.

•

Bypass the power and ground with a capacitor of approximately 1 µF and a number of 0.1-µF ceramic capacitors.

•

Minimize PCB trace lengths for high-frequency signals. This is especially critical in systems with higher capacitive loads that 
could create higher transient currents in the V

DD

 and V

SS

 circuits.

•

Take special care to minimize noise levels on the V

DDA

 and V

SSA

 pins.

•

Use separate power planes for V

DD

 and V

DDA

 and separate ground planes for V

SS

 and V

SSA

. Connect the separate analog 

and digital power and ground planes as close as possible to power supply outputs. If both analog circuit and digital circuits 
are powered by the same power supply, it is advisable to connect a small inductor or ferrite bead in series with both the V

DDA

 

and V

SSA

 traces.

•

Physically separate the analog components from noisy digital components by ground planes. Do not place an analog trace 
in parallel with digital traces. It is also desirable to place an analog ground trace around an analog signal trace to isolate it 
from digital traces.

•

Provide an interface to the BKGD/MS pin if in-circuit debug capability is desired.

•

Ensure that resistors R

P1

 and R

P2

, in the following figure, match the requirements stated in the I

2

C standard. For the shown 

configuration, the value of 4.7 k

 would be appropriate.

I

2

C pullup resistors, a ferrite bead, and a few bypass capacitors are all that are required to attach this device to a host platform. 

The basic configurations are shown in the following two figures. In addition, the RGPIO pins can be programmed to generate 
interrupts to a host platform in response to the occurrence of real-time application events. In this case, the pins should be routed 
to the external interrupt pins of the CPU.

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