Техническая Спецификация для Freescale Semiconductor Tower System Kit for MC9S08PT60 Series TWR-S08PT60-KIT TWR-S08PT60-KIT
Модели
TWR-S08PT60-KIT
θ
JA
= Package thermal resistance, junction-to-ambient, °C/W
P
D
= P
int
+ P
I/O
P
int
= I
DD
× V
DD
, Watts - chip internal power
P
I/O
= Power dissipation on input and output pins - user determined
For most applications, P
I/O
<< P
int
and can be neglected. An approximate relationship
between P
D
and T
J
(if P
I/O
is neglected) is:
P
D
= K ÷ (T
J
+ 273 °C)
Solving the equations above for K gives:
K = P
D
× (T
A
+ 273 °C) +
θ
JA
× (P
D
)
2
where K is a constant pertaining to the particular part. K can be determined by measuring
P
P
D
(at equilibrium) for an known T
A
. Using this value of K, the values of P
D
and T
J
can
be obtained by solving the above equations iteratively for any value of T
A
.
6 Peripheral operating requirements and behaviors
6.1 External oscillator (XOSC) and ICS characteristics
Table 9. XOSC and ICS specifications (temperature range = -40 to 105 °C ambient)
Num
C
Characteristic
Symbol
Min
Typical
Max
Unit
1
C
Oscillator
crystal or
resonator
Low range (RANGE = 0)
f
lo
32
—
40
kHz
C
High range (RANGE = 1)
f
hi
4
—
20
MHz
C
High range (RANGE = 1),
high gain (HGO = 1),
FBELP mode
f
hi
4
—
20
MHz
C
High range (RANGE = 1),
low power (HGO = 0),
FBELP mode
f
hi
4
—
20
MHz
2
D
Load capacitors
C1, C2
Table continues on the next page...
Peripheral operating requirements and behaviors
MC9S08PT60 Series Data Sheet, Rev. 3, 4/2012.
18
Freescale Semiconductor, Inc.