Техническая Спецификация для Freescale Semiconductor MC56F8006 Demo board MC56F8006DEMO MC56F8006DEMO

Freescale Semiconductor

43

A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete 
DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot 
temperature, unless specified otherwise in the device specification.

This section provides information about operating temperature range, power dissipation, and package thermal resistance. Power 
dissipation on I/O pins is usually small compared to the power dissipation in on-chip logic and voltage regulator circuits, and 
it is user-determined rather than being controlled by the MCU design. To take P

I/O

 into account in power calculations, determine 

the difference between actual pin voltage and V

SS

 or V

DD

 and multiply by the pin current for each I/O pin. Except in cases of 

unusually high pin current (heavy loads), the difference between pin voltage and V

SS

 or V

DD

 will be very small.

Human 

Body

Series Resistance

R1

1500



Storage Capacitance

C

100

pF

Number of Pulses per Pin

—

3

Machine

Series Resistance

R1

0



Storage Capacitance

C

200

pF

Number of Pulses per Pin

—

3

Latch-up

Minimum inpUt Voltage Limit

–2.5

V

Maximum Input Voltage Limit

7.5

V

1

Parameter is achieved by design characterization on a small sample size from typical devices un-

der typical conditions unless otherwise noted.

ESD for Human Body Model (HBM)

2000

—

—

V

ESD for Machine Model (MM)

200

—

—

V

ESD for Charge Device Model (CDM)

750

—

—

V

Latch-up current at T

A

= 85

o

C (I

LAT

)

 100

mA

Junction to ambient

Natural convection

Single layer board 

(1s)

R

JA

70

°C/W

Junction to ambient

Natural convection

Four layer board 

(2s2p)

R

JMA

47

°C/W

Junction to ambient 

(@200 ft/min)

Single layer board 

(1s)

R

JMA

55

°C/W