Справочник Пользователя для Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256
Модели
DEMO9S12XHY256
Device Overview MC9S12XHY-Family
MC9S12XHY-Family Reference Manual, Rev. 1.04
52
Freescale Semiconductor
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the PLL self clocking
•
the oscillator
The clock generated by the PLL or oscillator provides the main system clock frequencies core clock and
bus clock. As shown in
bus clock. As shown in
, these system clocks are used throughout the MCU to drive the core,
the memories, and the peripherals.
The program Flash memory is supplied by the bus clock and the oscillator clock. The oscillator clock is
used as a time base to derive the program and erase times for the NVMs.
used as a time base to derive the program and erase times for the NVMs.
The CAN modules may be configured to have their clock sources derived either from the bus clock or
directly from the oscillator clock. This allows the user to select its clock based on the required jitter
performance.
directly from the oscillator clock. This allows the user to select its clock based on the required jitter
performance.
In order to ensure the presence of the clock the MCU includes an on-chip clock monitor connected to the
output of the oscillator. The clock monitor can be configured to invoke the PLL self-clocking mode or to
generate a system reset if it is allowed to time out as a result of no oscillator clock being present.
output of the oscillator. The clock monitor can be configured to invoke the PLL self-clocking mode or to
generate a system reset if it is allowed to time out as a result of no oscillator clock being present.
In addition to the clock monitor, the MCU also provides a clock quality checker which performs a more
accurate check of the clock. The clock quality checker counts a predetermined number of clock edges
within a defined time window to insure that the clock is running. The checker can be invoked following
specific events such as on wake-up or clock monitor failure.
accurate check of the clock. The clock quality checker counts a predetermined number of clock edges
within a defined time window to insure that the clock is running. The checker can be invoked following
specific events such as on wake-up or clock monitor failure.
1.9
Modes of Operation
The MCU can operate in different modes. These are described in
The MCU can operate in different power modes to facilitate power saving when full system performance
is not required. These are described in
is not required. These are described in
Some modules feature a software programmable option to freeze the module status whilst the background
debug module is active to facilitate debugging.
debug module is active to facilitate debugging.
1.9.1
Chip Configuration Summary
The different modes and the security state of the MCU affect the debug features (enabled or disabled). The
operating mode out of reset is determined by the state of the MODC signal during reset (see
operating mode out of reset is determined by the state of the MODC signal during reset (see
The MODC bit in the MODE register shows the current operating mode and provides limited mode