Техническая Спецификация для Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK

 804

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

– MData0/Data1/Data2

• If NB_TRANS = 2, the sequence should be either 

– MData0

– MData0/Data1

• If NB_TRANS = 1, the sequence should be 

– Data0

The user can ascertain the bank status (free or busy), and the toggle sequencing of the data packet for each bank
with the UDPHS_EPTSTAx register in the three bit fields as follows:

• TOGGLESQ_STA: PID of the data stored in the current bank

• CURRENT_BANK: Number of the bank currently being accessed by the microcontroller.

• BUSY_BANK_STA: Number of busy bank

This is particularly useful in case of a missing data packet.

If the inter-packet delay between the OUT token and the Data is greater than the USB standard, then the ISO-OUT
transaction is ignored. (Payload data is not written, no interrupt is generated to the CPU.)

If there is a data CRC (Cyclic Redundancy Check) error, the payload is, none the less, written in the endpoint. The
ERR_CRISO flag is set in UDPHS_EPTSTAx register.

If the endpoint is already full, the packet is not written in the DPRAM. The ERR_FL_ISO flag is set in
UDPHS_EPTSTAx.

If the payload data is greater than the maximum size of the endpoint, then the ERR_OVFLW flag is set. It is the
task of the CPU to manage this error. The data packet is written in the endpoint (except the extra data).

If the host sends a Zero Length Packet, and the endpoint is free, no data is written in the endpoint, the
RX_BK_RDY flag is set, and the BYTE_COUNT field in UDPHS_EPTSTAx register is null. 

The FRCESTALL command bit is unused for an isochonous endpoint.

Otherwise, payload data is written in the endpoint, the RX_BK_RDY interrupt is generated and the BYTE_COUNT
in UDPHS_EPTSTAx register is updated.