Техническая Спецификация для Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO

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Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
17.5.8 Register Access Protection
All registers with write-access are optionally write-protected by the peripheral access controller (PAC), except the 
following registers:
z
Interrupt Flag Status and Clear register (INTFLAG - refer to 
)
Write-protection is denoted by the Write-Protection property in the register description. 
When the CPU is halted in debug mode, all write-protection is automatically disabled.
Write-protection does not apply for accesses through an external debugger. Refer to 
17.5.9 Analog Connections
Not applicable.
17.6
Functional Description
17.6.1 Principle of Operation
The Watchdog Timer (WDT) is a system for monitoring correct program operation, making it possible to recover from 
error situations such as runaway code by issuing a reset. When enabled, the WDT is a constantly running timer that is 
configured to a predefined time-out period. Before the end of the time-out period, the WDT should be reconfigured.
The WDT has two modes of operation, normal and window. Additionally, the user can enable Early Warning interrupt 
generation in each of the modes. The description for each of the basic modes is given below. The settings in the Control 
register (CTRL - refer to 
) and the Interrupt Enable register (INTENCLR/SET - refer to 
) determine the 
mode of operation, as illustrated in 
17.6.2 Basic Operation
17.6.2.1  Initialization
The following registers are enable-protected:
z
Control register (CTRL - refer to 
), except the Enable bit (CTRL.ENABLE)
z
z
Early Warning Interrupt Control register (EWCTRL - refer to 
)
Any writes to these bits or registers when the WDT is enabled or is being enabled (CTRL.ENABLE is one) will be 
discarded. Writes to these registers while the WDT is being disabled will be completed after the disabling is complete. 
Enable-protection is denoted by the Enable-Protected property in the register description.
Initialization of the WDT can be done only while the WDT is disabled. The WDT is configured by defining the required 
Time-Out Period bits in the Configuration register (CONFIG.PER). If window-mode operation is required, the Window 
Table 17-1. WDT Operating Modes
ENABLE
WEN
Interrupt
Enable
Mode
0
x
x
Stopped
1
0
0
Normal
1
0
1
Normal with Early Warning interrupt
1
1
0
Window
1
1
1
Window with Early Warning interrupt