Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
381
AT32UC3A
Figure 27-15.
WRITE_MODE = 1. The write operation is controlled by NWE
– Write is Controlled by NCS (WRITE_MODE = 0)
shows the waveforms of a write operation with WRITE_MODE set to 0. The data is
put on the bus during the pulse and hold steps of the NCS signal. The internal data buffers are
turned out after the NCS_WR_SETUP time, and until the end of the write cycle, regardless of
the programmed waveform on NWE.
Figure 27-16.
WRITE_MODE = 0. The write operation is controlled by NCS
27.6.4.6
Coding Timing Parameters
All timing parameters are defined for one chip select and are grouped together in one REGIS-
TER according to their type.
CLK_SMC
A[25:2]
NBS0, NBS1,
A0, A1
NWE,
NWR0, NWR1
NCS
D[15:0]
CLK_SMC
A[25:2]
NBS0, NBS1,
A0, A1
NWE,
NWR0, NWR1
NCS
D[15:0]
32058K
AVR32-01/12