Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
380
AT32UC3A
Figure 27-14.
Null Setup and Hold Values of NCS and NWE in Write Cycle
– Null Pulse
Programming null pulse is not permitted. Pulse must be at least set to 1. A null value leads to
unpredictable behavior.
27.6.4.5
Write Mode
The WRITE_MODE parameter in the MODE register of the corresponding chip select indicates
which signal controls the write operation.
– Write is Controlled by NWE (WRITE_MODE = 1):
shows the waveforms of a write operation with WRITE_MODE set to 1. The data is
put on the bus during the pulse and hold steps of the NWE signal. The internal data buffers are
turned out after the NWE_SETUP time, and until the end of the write cycle, regardless of the
programmed waveform on NCS.
CLK_SMC
A[25:2]
NBS0, NBS1,
A0, A1
NWE,
NWE0, NWE1
NCS
NWE_SETUP
NWE_PULSE
NCS_WR_PULSE
NCS_WR_SETUP
NWE_CYCLE
D[15:0]
NWE_CYCLE
NWE_PULSE
NCS_WR_PULSE
NWE_CYCLE
32058K
AVR32-01/12